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Message-ID: <CABPqkBRywcQo9XwNVRxKg0+K+zW0n7DBJvAHFhk82dRr1Lkhrg@mail.gmail.com>
Date: Fri, 5 Sep 2014 23:38:10 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Ingo Molnar <mingo@...nel.org>
Cc: LKML <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
"mingo@...e.hu" <mingo@...e.hu>,
Arnaldo Carvalho de Melo <acme@...hat.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
David Ahern <dsahern@...il.com>
Subject: Re: [PATCH v4 2/6] perf/x86: add support for sampling PEBS machine
state registers
On Fri, Sep 5, 2014 at 12:35 PM, Ingo Molnar <mingo@...nel.org> wrote:
>
> * Stephane Eranian <eranian@...gle.com> wrote:
>
>> PEBS can capture machine state regs at retiremnt of the sampled
>> instructions. When precise sampling is enabled on an event, PEBS
>> is used, so substitute the interrupted state with the PEBS state.
>> Note that not all registers are captured by PEBS. Those missing
>> are replaced by the interrupt state counter-parts.
>>
>> Signed-off-by: Stephane Eranian <eranian@...gle.com>
>> ---
>> arch/x86/kernel/cpu/perf_event_intel_ds.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> index 9dc4199..139a8a5 100644
>> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> @@ -886,6 +886,23 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
>> regs.bp = pebs->bp;
>> regs.sp = pebs->sp;
>>
>> + if (sample_type & PERF_SAMPLE_REGS_INTR) {
>> + regs.ax = pebs->ax;
>> + regs.bx = pebs->bx;
>> + regs.cx = pebs->cx;
>> + regs.si = pebs->si;
>> + regs.di = pebs->di;
>> +
>> + regs.r8 = pebs->r8;
>> + regs.r9 = pebs->r9;
>> + regs.r10 = pebs->r10;
>> + regs.r11 = pebs->r11;
>> + regs.r12 = pebs->r12;
>> + regs.r13 = pebs->r13;
>> + regs.r14 = pebs->r14;
>> + regs.r14 = pebs->r15;
>
> Beyond regs.r15, is pebs->dx left out on purpose? It's part of
> pebs_record_hsw so presumably the hardware fills it in.
>
Yep, will fix that one too in v5.
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