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Message-ID: <20140907135850.GA23026@khazad-dum.debian.net>
Date: Sun, 7 Sep 2014 10:58:50 -0300
From: Henrique de Moraes Holschuh <hmh@....eng.br>
To: Toshi Kani <toshi.kani@...com>
Cc: Ingo Molnar <mingo@...nel.org>, hpa@...or.com, tglx@...utronix.de,
mingo@...hat.com, akpm@...uxfoundation.org, arnd@...db.de,
linux-mm@...ck.org, linux-kernel@...r.kernel.org, jgross@...e.com,
stefan.bader@...onical.com, luto@...capital.net,
konrad.wilk@...cle.com
Subject: Re: [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR
On Fri, 05 Sep 2014, Toshi Kani wrote:
> On Fri, 2014-09-05 at 12:23 +0200, Ingo Molnar wrote:
> > Any reason why we have to create such a sharp boundary, instead
> > of simply saying: 'disable PAT on all x86 CPU families that have
> > at least one buggy model'?
> >
> > That would nicely sort out all the broken CPUs, and would make it
> > highly unlikely that we'd accidentally forget about a model or
> > two.
>
> Agreed. I will disable this feature on all Pentium 4 models as well. I
> do not think there is any necessity to enable it on Pentium 4.
Thank you. That takes care of my misguivings about enabling this on aging
platforms as well.
--
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot
Henrique Holschuh
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