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Message-ID: <CANOLnONWPdO80XWOYQatmOh+Ek107fBXDiqD3DpMXeazjLcdMg@mail.gmail.com>
Date: Mon, 8 Sep 2014 20:23:13 +0300
From: Grazvydas Ignotas <notasas@...il.com>
To: Nishanth Menon <nm@...com>
Cc: Santosh Shilimkar <santosh.shilimkar@...com>,
Tony Lindgren <tony@...mide.com>,
Paul Walmsley <paul@...an.com>,
Kevin Hilman <khilman@...prootsystems.com>,
Keerthy <j-keerthy@...com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Tero Kristo <t-kristo@...com>,
Benoît Cousson <bcousson@...libre.com>,
"linux-omap@...r.kernel.org" <linux-omap@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 07/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend
Hi,
On Sat, Sep 6, 2014 at 12:15 AM, Nishanth Menon <nm@...com> wrote:
>
> Hi,
>
> Updated patch below:
> Do let me know if this is ok with folks.
>
> ---8<----
> From 1b9e11834dac2bd75c396aa7495c806b027653fe Mon Sep 17 00:00:00 2001
> From: Rajendra Nayak <rnayak@...com>
> Date: Mon, 27 May 2013 15:46:44 +0530
> Subject: [PATCH V2 7/10] ARM: OMAP5 / DRA7: Enable CPU RET on suspend
>
> On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
> and instead attempt a CPU RET and side effect, MPU RET in suspend.
>
> NOTE: the hardware was originally designed to be capable of achieving
> deep power states such as OFF and OSWR, however due to various issues
> and risks, deepest valid state was determined to be CSWR - hence we use
Would be great to have some more details here..
So there is no hope for OFF mode on OMAP5?
--
Gražvydas
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