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Message-ID: <CAG374jDLuwxYfxqY9UGt7+5gqo7eZxFn-=ehEpRJQfyCeWG3fQ@mail.gmail.com>
Date:	Tue, 9 Sep 2014 11:24:50 +0200
From:	Gabriel Fernandez <gabriel.fernandez@...aro.org>
To:	Kishon Vijay Abraham I <kishon@...com>
Cc:	Gabriel FERNANDEZ <gabriel.fernandez@...com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Srinivas Kandagatla <srinivas.kandagatla@...il.com>,
	Maxime Coquelin <maxime.coquelin@...com>,
	Patrice Chotard <patrice.chotard@...com>,
	Russell King <linux@....linux.org.uk>,
	Grant Likely <grant.likely@...aro.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"kernel@...inux.com" <kernel@...inux.com>,
	alexandre torgue <alexandre.torgue@...com>,
	Giuseppe Cavallaro <peppe.cavallaro@...com>
Subject: Re: [PATCH v2 1/8] phy: miphy28lp: Add Device Tree bindings for the MiPHY28lp

Hi Kishon,

ok will be fix to v3

BR

Gabriel

On 8 September 2014 16:33, Kishon Vijay Abraham I <kishon@...com> wrote:
> Hi,
>
> On Wednesday 03 September 2014 09:07 PM, Gabriel FERNANDEZ wrote:
>> The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
>> or USB3 devices.
>>
>> Signed-off-by: alexandre torgue <alexandre.torgue@...com>
>> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@...com>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...aro.org>
>> ---
>>  .../devicetree/bindings/phy/phy-miphy28lp.txt      | 126 +++++++++++++++++++++
>>  1 file changed, 126 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/phy/phy-miphy28lp.txt
>>
>> diff --git a/Documentation/devicetree/bindings/phy/phy-miphy28lp.txt b/Documentation/devicetree/bindings/phy/phy-miphy28lp.txt
>> new file mode 100644
>> index 0000000..5e307af
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/phy-miphy28lp.txt
>> @@ -0,0 +1,126 @@
>> +STMicroelectronics STi MIPHY28LP PHY binding
>> +============================================
>> +
>> +This binding describes a miphy device that is used to control PHY hardware
>> +for SATA, PCIe or USB3.
>> +
>> +Required properties (controller (parent) node):
>> +- compatible : Should be "st,miphy28lp-phy"
>> +- st,syscfg  : Should be a phandle of the system configuration register group
>> +               which contain the SATA, PCIe or USB3 mode setting bits
>> +
>> +Required nodes       :  A sub-node is required for each channel the controller
>> +                provides. Address range information including the usual
>> +                'reg' and 'reg-names' properties are used inside these
>> +                nodes to describe the controller's topology. These nodes
>> +                are translated by the driver's .xlate() function.
>> +
>> +Required properties (port (child) node):
>> +- #phy-cells : Should be 1 (See second example)
>> +               Cell after port phandle is device type from:
>> +                     - MIPHY_TYPE_SATA
>> +                     - MIPHY_TYPE_PCI
>> +                     - MIPHY_TYPE_USB3
>> +- reg                : Address and length of the register set for the device
>> +- reg-names  : The names of the register addresses corresponding to the registers
>> +               filled in "reg". Is can also contain the offset of the system configuration
>
> %s/Is/It
>
> Thanks
> Kishon
--
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