lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Tue, 9 Sep 2014 11:42:20 -0400
From:	Jason Cooper <jason@...edaemon.net>
To:	Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:	Mike Turquette <mturquette@...aro.org>,
	linux-kernel@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	linux-arm-kernel@...ts.infradead.org,
	Lior Amsalem <alior@...vell.com>,
	Tawfik Bayouk <tawfik@...vell.com>,
	Nadav Haklai <nadavh@...vell.com>,
	Raphael Rigo <ml-arm@...call.eu>,
	Arnaud Ebalard <arno@...isbad.org>,
	Simon Boulay <simon.boulay@...ec.com>,
	Leigh Brown <leigh@...inno.co.uk>
Subject: Re: [PATCH V2 0/4] clk: mvebu: Improve clock drift

On Tue, Sep 02, 2014 at 10:15:15AM +0200, Gregory CLEMENT wrote:
> Hi Mike, Jason, Andrew and Sebastian,
> 
> Few users reported a timer drift on the Armada 370 based board such as
> the mirabox or the Netgear ReadyNAS 102. This is the second series
> with few improvements after the review of the 1st version.
> 
> The reason is that when the SSCG (Spread Spectrum Clock Generator) is
> enabled, it shifts the frequency of the clock. The percentage is no
> more than 1% but when the clock is used for a timer it leads to a
> clock drift.
> 
> This series allows to correct the affected clock when the SSCG is
> enabled. This drift can happen on all the mvebu SoC on the cpu clock
> block (ie cpu, ddr and l2 cache). Currently the only notable effect is
> for the Armada 370 because this SoC use the l2cache clock as source
> for the timer. That's why even if the series allow any of the mvebu
> SoC to benefit to this correction, Armada 370 is the only user of it.
> 
> The first 2 patches should go through the clk subsystem, whereas the
> third one should go to the arm-soc through the mvebu tree.
> 
> The last one is just to fix a typo I found while I was reading the clk
> code.
> 
> Thanks,
> 
> Gregory
> 
> Changelog:
> 
> v1 -> v2:
> - made the function a370_is_sscg_enabled() a static one
> - reword the comment to make clear that the formula in datasheet is
>   erroneous
> - added a fix_sscg_deviation() callback in order to be able to deal
>   with the Dove case which is different from the other mvebu SoCs
> 
> 
> Gregory CLEMENT (4):
>   clk: mvebu: Fix clk frequency value if SSCG is enabled
>   clk: mvebu: armada-370: Fix timer drift caused by the SSCG deviation
>   ARM: mvebu: add SSCG to Armada 370 Device Tree
>   clk: mvebu: armada-375: Fix the description of the SAR in the comment
> 
>  arch/arm/boot/dts/armada-370.dtsi |  4 ++
>  drivers/clk/mvebu/armada-370.c    |  8 ++++
>  drivers/clk/mvebu/armada-375.c    |  4 +-
>  drivers/clk/mvebu/common.c        | 82 +++++++++++++++++++++++++++++++++++++++
>  drivers/clk/mvebu/common.h        |  7 ++++
>  5 files changed, 103 insertions(+), 2 deletions(-)

Patches 1, 2, and 4 applied to mvebu/drivers-clk with Leigh's Tested-by.
#3 applied to mvebu/dt with same Tested-by.

thx,

Jason.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ