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Message-ID: <20140910173335.594bf533@canb.auug.org.au>
Date:	Wed, 10 Sep 2014 17:33:35 +1000
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Mike Turquette <mturquette@...aro.org>,
	Simon Horman <horms@...ge.net.au>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Ulrich Hecht <ulrich.hecht+renesas@...il.com>
Subject: linux-next: manual merge of the clk tree with the renesas tree

Hi Mike,

Today's linux-next merge of the clk tree got a conflict in
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
between commit b32c44b93af3 ("clk: shmobile: Add r8a7740, sh73a0 SoCs
to MSTP bindings") from the renesas tree and commit 5acb7bbbab7c ("ARM:
shmobile: r8a7794: document MSTP clock support") from the clk tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index 8f1424f0fa43,a03c8c029a94..000000000000
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@@ -15,7 -14,7 +15,8 @@@ Required Properties
      - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
      - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
      - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
+     - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks
 +    - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks
      - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
    - reg: Base address and length of the I/O mapped registers used by the MSTP
      clocks. The first register is the clock control register and is mandatory.

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