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Message-ID: <20140911013811.GB17692@csclub.uwaterloo.ca>
Date:	Wed, 10 Sep 2014 21:38:11 -0400
From:	"Lennart Sorensen" <lsorense@...lub.uwaterloo.ca>
To:	Mugunthan V N <mugunthanvnm@...com>
Cc:	bcousson@...libre.com, tony@...mide.com,
	devicetree@...r.kernel.org, linux-omap@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes
 for dra7

On Wed, Sep 10, 2014 at 07:07:26PM +0530, Mugunthan V N wrote:
> Add CPSW and MDIO related device tree data for DRA7XX and made as status
> disabled. Phy-id, pinmux for active and sleep state needs to be added in
> board dts files and enable the CPSW device.
> 
> Signed-off-by: Mugunthan V N <mugunthanvnm@...com>
> ---
>  arch/arm/boot/dts/dra7.dtsi | 59 +++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index d678152..8d79321 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -34,6 +34,8 @@
>  		serial3 = &uart4;
>  		serial4 = &uart5;
>  		serial5 = &uart6;
> +		ethernet0 = &cpsw_emac0;
> +		ethernet1 = &cpsw_emac1;
>  	};
>  
>  	timer {
> @@ -1262,6 +1264,63 @@
>  			ti,irqs-skip = <10 133 139 140>;
>  			ti,irqs-safe-map = <0>;
>  		};
> +
> +		mac: ethernet@...00000 {
> +			compatible = "ti,cpsw";
> +			ti,hwmods = "gmac";
> +			cpdma_channels = <8>;
> +			ale_entries = <1024>;
> +			bd_ram_size = <0x2000>;
> +			no_bd_ram = <0>;
> +			rx_descs = <64>;
> +			mac_control = <0x20>;
> +			slaves = <2>;

How am I supposed to override this in the board dtb when my board only
uses 1 slave?

> +			active_slave = <0>;
> +			cpts_clock_mult = <0x80000000>;
> +			cpts_clock_shift = <29>;
> +			reg = <0x48484000 0x1000
> +			       0x48485200 0x2E00>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			/*
> +			 * rx_thresh_pend
> +			 * rx_pend
> +			 * tx_pend
> +			 * misc_pend
> +			 */
> +			interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
> +			ranges;
> +			status = "disabled";
> +
> +			davinci_mdio: mdio@...85000 {
> +				compatible = "ti,davinci_mdio";
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				ti,hwmods = "davinci_mdio";
> +				bus_freq = <1000000>;
> +				reg = <0x48485000 0x100>;
> +			};
> +
> +			cpsw_emac0: slave@...80200 {
> +				/* Filled in by U-Boot */
> +				mac-address = [ 00 00 00 00 00 00 ];
> +			};
> +
> +			cpsw_emac1: slave@...80300 {
> +				/* Filled in by U-Boot */
> +				mac-address = [ 00 00 00 00 00 00 ];
> +			};

Should I then be setting this to disabled from my board file?  Or does
the disabled for the ethernet overall take care of that?

> +			phy_sel: cpsw-phy-sel@...02554 {
> +				compatible = "ti,dra7xx-cpsw-phy-sel";
> +				reg= <0x4a002554 0x4>;
> +				reg-names = "gmii-sel";
> +			};

I guess the board file would have to disable that too (we won't have a
phy given we are connecting to a switch chip).

> +		};
> +
>  	};
>  };

-- 
Len Sorensen
--
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