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Message-ID: <lsq.1410438733.290741435@decadent.org.uk>
Date: Thu, 11 Sep 2014 13:32:13 +0100
From: Ben Hutchings <ben@...adent.org.uk>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC: akpm@...ux-foundation.org, "David S. Miller" <davem@...emloft.net>
Subject: [PATCH 3.2 115/131] sparc64: Do not insert non-valid PTEs into
the TSB hash table.
3.2.63-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: "David S. Miller" <davem@...emloft.net>
[ Upstream commit 18f38132528c3e603c66ea464727b29e9bbcb91b ]
The assumption was that update_mmu_cache() (and the equivalent for PMDs) would
only be called when the PTE being installed will be accessible by the user.
This is not true for code paths originating from remove_migration_pte().
There are dire consequences for placing a non-valid PTE into the TSB. The TLB
miss frramework assumes thatwhen a TSB entry matches we can just load it into
the TLB and return from the TLB miss trap.
So if a non-valid PTE is in there, we will deadlock taking the TLB miss over
and over, never satisfying the miss.
Just exit early from update_mmu_cache() and friends in this situation.
Based upon a report and patch from Christopher Alexander Tobias Schulze.
Signed-off-by: David S. Miller <davem@...emloft.net>
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
---
arch/sparc/mm/init_64.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index b4989f9..77ad815 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -309,6 +309,10 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
tsb_index = MM_TSB_BASE;
tsb_hash_shift = PAGE_SHIFT;
+ /* Don't insert a non-valid PTE into the TSB, we'll deadlock. */
+ if (!(pte_val(pte) & _PAGE_VALID))
+ return;
+
spin_lock_irqsave(&mm->context.lock, flags);
#ifdef CONFIG_HUGETLB_PAGE
--
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