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Message-ID: <1410444181.7023.25.camel@linux.intel.com>
Date: Thu, 11 Sep 2014 17:03:01 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Jiang Liu <jiang.liu@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
x86@...nel.org
Subject: Re: Ask help about pre_init_apic_IRQ0()
On Thu, 2014-09-11 at 14:58 +0200, Thomas Gleixner wrote:
[]
> According to the MID code the apbt horror is only used for moorestown.
> Medfield and later use the local apic timer without the apbt nonsense.
>
> The best thing we can do is to drop moorestown support and get rid of
> that apbt nonsense alltogether.
Alan Cox removed Moorestown (as a platform) support in 2012 IIRC.
So, AFAIK you may safely remove those leftovers.
> I don't think anyone deeply cares about it not being supported from
> 3.18 on. The number of devices which sport a moorestown should be
> pretty limited and the only relevant use case of those is to act as a
> pocket heater with short battery life time. Its pretty pointless to
> update kernels on pocket heaters except for bragging reasons.
>
> If someone at Intel really thinks that we need to keep moorestown
> alive for other than documentary and sentimental reasons, then we can
> move the apbt setup to x86_init.timers.setup_percpu_clockev(). At that
> point the IOAPIC is setup already, so it should just work. Untested
> patch below.
Suddenly I have one priority work to do and my Medfield tablet doesn't
boot by some reason. I would try to test it as soon as I can.
>
> Thanks,
>
> tglx
>
> ------------------
> Index: linux/arch/x86/platform/intel-mid/intel-mid.c
> ===================================================================
> --- linux.orig/arch/x86/platform/intel-mid/intel-mid.c
> +++ linux/arch/x86/platform/intel-mid/intel-mid.c
> @@ -81,26 +81,34 @@ static unsigned long __init intel_mid_ca
> return 0;
> }
>
> +static void __init intel_mid_setup_bp_timer(void)
> +{
> + apbt_time_init();
> + setup_boot_APIC_clock();
> +}
> +
> static void __init intel_mid_time_init(void)
> {
> sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
> +
> switch (intel_mid_timer_options) {
> case INTEL_MID_TIMER_APBT_ONLY:
> break;
> case INTEL_MID_TIMER_LAPIC_APBT:
> - x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
> + /* Use apbt and local apic */
> + x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer;
> x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
> - break;
> + return;
> default:
> if (!boot_cpu_has(X86_FEATURE_ARAT))
> break;
> + /* Lapic only, no apbt */
> x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
> x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
> return;
> }
> - /* we need at least one APB timer */
> - pre_init_apic_IRQ0();
> - apbt_time_init();
> +
> + x86_init.timers.setup_percpu_clockev = apbt_time_init;
> }
>
> static void intel_mid_arch_setup(void)
--
Andy Shevchenko <andriy.shevchenko@...el.com>
Intel Finland Oy
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