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Message-ID: <CAD=FV=XMmizxJFPj0FEhJ7Gk4ZcQaUJDxf_Qq5kGKSvxDFVmzg@mail.gmail.com>
Date:	Thu, 11 Sep 2014 10:11:02 -0700
From:	Doug Anderson <dianders@...omium.org>
To:	Marc Zyngier <marc.zyngier@....com>
Cc:	Will Deacon <will.deacon@....com>,
	"olof@...om.net" <olof@...om.net>,
	Sonny Rao <sonnyrao@...omium.org>,
	Catalin Marinas <Catalin.Marinas@....com>,
	Mark Rutland <Mark.Rutland@....com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Sudeep Holla <Sudeep.Holla@....com>,
	Christopher Covington <cov@...eaurora.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Nathan Lynch <Nathan_Lynch@...tor.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	Pawel Moll <Pawel.Moll@....com>,
	"ijc+devicetree@...lion.org.uk" <ijc+devicetree@...lion.org.uk>,
	"galak@...eaurora.org" <galak@...eaurora.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] clocksource: arch_timer: Allow the device tree to
 specify the physical timer

Hi,

On Thu, Sep 11, 2014 at 10:00 AM, Marc Zyngier <marc.zyngier@....com> wrote:
> On 11/09/14 17:47, Will Deacon wrote:
>> On Thu, Sep 11, 2014 at 05:16:44PM +0100, Doug Anderson wrote:
>>> Some 32-bit (ARMv7) systems are architected like this:
>>>
>>> * The firmware doesn't know and doesn't care about hypervisor mode and
>>>   we don't want to add the complexity of hypervisor there.
>>>
>>> * The firmware isn't involved in SMP bringup or resume.
>>>
>>> * The ARCH timer come up with an uninitialized offset between the
>>>   virtual and physical counters.  Each core gets a different random
>>>   offset.
>>>
>>> On systems like the above, it doesn't make sense to use the virtual
>>> counter.  There's nobody managing the offset and each time a core goes
>>> down and comes back up it will get reinitialized to some other random
>>> value.
>>
>> You probably need to rephrase this slightly, as there *is* still a
>> requirement on the hypervisor/firmware (actually, two!). See below.
>>
>>> Let's add a property to the device tree to say that we shouldn't use
>>> the virtual timer.  Firmware could potentially remove this property
>>> before passing the device tree to the kernel if it really wants the
>>> kernel to use a virtual timer.
>>>
>>> Note that it's been said that ARM64 (ARMv8) systems the firmware and
>>> kernel really can't be architected as described above.  That means
>>> using the physical timer like this really only makes sense for ARMv7
>>> systems.
>>
>> I'd go further: this only makes sense if you're booting in secure SVC
>> mode.
>
> If that's the case, what's the problem? Enter monitor mode, set SCR.NS
> to one, nuke CNTVOFF, revert, job done.
>
> What am I missing?

Stuff like this was talked about in the thread about Sonny's patch at
<https://patchwork.kernel.org/patch/4790921/>

...in that case we were always talking about HYP mode, though.  I
don't think anyone has explicitly talked about just switching to
monitor mode and then leaving ourselves in Secure SVC after we're
done.  It would be nice (especially for the VDSO guys) if we could
just init the virtual offset...

We would need to run this code potentially at processor bringup and
after suspend/resume, but that seems possible too.

Is the transition to monitor mode and back simple?  Where would you
suggest putting this code?  It would definitely need to be pretty
early.  We'd also need to be able to detect that we're in Secure SVC
and not mess up anyone else who happened to boot in Non Secure SVC.

-Doug
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