linux-kernel - Re: [PATCH arm64-next] net: bpf: arm64: address randomize and write protect JIT code

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Date:	Fri, 12 Sep 2014 18:21:27 +0200
From:	Daniel Borkmann <dborkman@...hat.com>
To:	Catalin Marinas <catalin.marinas@....com>
CC:	Will Deacon <Will.Deacon@....com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"zlim.lnx@...il.com" <zlim.lnx@...il.com>,
	"ast@...mgrid.com" <ast@...mgrid.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH arm64-next] net: bpf: arm64: address randomize and write
 protect JIT code

On 09/12/2014 06:03 PM, Catalin Marinas wrote:
> Daniel,
>
> On Fri, Sep 12, 2014 at 08:11:37AM +0100, Daniel Borkmann wrote:
>>   Will, Catalin, Dave, this is more or less a heads-up: when net-next and
>>   arm64-next tree will get both merged into Linus' tree, we will run into
>>   a 'silent' merge conflict until someone actually runs eBPF JIT on ARM64
>>   and might notice (I presume) an oops when JIT is freeing bpf_prog. I'd
>>   assume nobody actually _runs_ linux-next, but not sure about that though.
>
> Some people do.
>
>>   How do we handle this? Would I need to resend this patch when the time
>>   comes or would you ARM64 guys take care of it automagically? ;)
>
> I think we could disable BPF for arm64 until -rc1 and re-enable it
> together with this patch.

Ok, yes, that would mitigate it a bit. Sounds fine to me.

> One comment below:
>
>> --- a/arch/arm64/net/bpf_jit_comp.c
>> +++ b/arch/arm64/net/bpf_jit_comp.c
> [...]
>> +static void jit_fill_hole(void *area, unsigned int size)
>> +{
>> +	/* Insert illegal UND instructions. */
>> +	u32 *ptr, fill_ins = 0xe7ffffff;
>
> On arm64 we don't have a guaranteed undefined instruction space (and
> Will tells me that on Thumb-2 for the 32-bit arm port it actually is a
> valid instruction, it seems that you used the same value).

Hm, ok, the boards we've tried out and where Zi tested it too, it worked.

> I think the only guaranteed way is to use the BRK #imm instruction but
> it requires some changes to the handling code as it is currently used
> for kgdb (unless you can use two instructions for filling in which could
> generate a NULL pointer access).

The trade-off would be that if we align on 8, it would certainly increase
the probability to jump to the right offset. Note, on x86_64 we have no
alignment requirements, hence 1, and on s390x only alignment of 2.

So, on that few (?) boards where UND would be a valid instruction [ as
opposed to crash the kernel ], would it translate into a NOP and just
'walk' from there into the JIT image?
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