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Message-ID: <5414FB5B.8090907@rock-chips.com>
Date: Sun, 14 Sep 2014 10:20:11 +0800
From: Jianqun <xjq@...k-chips.com>
To: Mark Brown <broonie@...nel.org>, Jianqun <jay.xu@...k-chips.com>
CC: heiko@...ech.de, lgirdwood@...il.com, perex@...ex.cz,
tiwai@...e.de, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
alsa-devel@...a-project.org, huangtao@...k-chips.com,
cf@...k-chips.com
Subject: Re: [PATCH 4/5] ASoC: rockchip-i2s: fix registers' property of rockchip
i2s controller
在 09/14/2014 12:36 AM, Mark Brown 写道:
> On Sat, Sep 13, 2014 at 08:42:12AM +0800, Jianqun wrote:
>> Reference rockchip I2S controller TRM, modify some registers' property
>> I2S_FIFOLR: read / write, but not volatile, not precious
>> I2S_INTSR: read / write
>> I2S_CLR: volatile, register value will be cleared by read
>
> Applied, again this is a bug fix (volatile and precious being wrong seem
> like bugs) so should have been earlier in the series.
>
ok, I'll re-order the patches
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