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Date:	Mon, 15 Sep 2014 18:50:34 +0200
From:	Arnd Bergmann <>
To:	Mika Westerberg <>
Cc:	Linus Walleij <>,
	Alexandre Courbot <>,
	Alan Cox <>, Ning Li <>,,
Subject: Re: [PATCH v2 1/2] gpio: Increase ARCH_NR_GPIOs to 512

On Monday 15 September 2014, Mika Westerberg wrote:
> Some newer Intel SoCs, like Braswell already have more than 256 GPIOs
> available so the default limit is exceeded. Instead of adding more
> architecture specific gpio.h files with custom ARCH_NR_GPIOs we increase
> the gpiolib default limit to be twice the current.
> Signed-off-by: Mika Westerberg <>
> ---
> Changes to previous version is that now we increase the common limit
> instead of adding x86 specific gpio.h

Can you please include the reasoning for this decision in the
changeset description? I'm sure you have your reasons, but from
the text above, it sounds like a rather bad idea. What other
architectures are impacted by this, and what is the kernel size
cost for it on those architectures?

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