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Message-ID: <20140917123100.GD2704@gmail.com>
Date:	Wed, 17 Sep 2014 14:31:00 +0200
From:	Ingo Molnar <mingo@...nel.org>
To:	"David E. Box" <david.e.box@...ux.intel.com>
Cc:	hpa@...or.com, tglx@...utronix.de, mingo@...hat.com,
	x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] x86: iosf: Move Kconfig to proper submenu


* David E. Box <david.e.box@...ux.intel.com> wrote:

> Moves Kconfig option to "Processor type and features" menu from main
> configuration menu.
> 
> Signed-off-by: David E. Box <david.e.box@...ux.intel.com>
> ---
>  arch/x86/Kconfig | 29 ++++++++++++++---------------
>  1 file changed, 14 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index bcbb57d..2db4b1d 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -480,6 +480,20 @@ config X86_INTEL_LPSS
>  	  things like clock tree (common clock framework) and pincontrol
>  	  which are needed by the LPSS peripheral drivers.
>  
> +config IOSF_MBI
> +	tristate "Intel System On Chip IOSF Sideband support"
> +	depends on PCI
> +	---help---
> +	  Enables sideband access to mailbox registers on SoC's. The sideband is
> +	  available on the following platforms. This list is not meant to be
> +	  exclusive.
> +	   - BayTrail
> +	   - Braswell
> +	   - Quark
> +
> +	  You should say Y if you are running a kernel on one of these
> +	  platforms.

What this help text does not tell us is why such sideband access 
is useful, why the user should enable it.

Thanks,

	Ingo
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