linux-kernel - Re: [PATCH] i2c-designware: Intel BayTrail PMIC I2C bus support

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Message-ID: <5419078B.3050305@linux.intel.com>
Date:	Wed, 17 Sep 2014 12:01:15 +0800
From:	"Li, Aubrey" <aubrey.li@...ux.intel.com>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	"David E. Box" <david.e.box@...ux.intel.com>
CC:	wsa@...-dreams.de, jdelvare@...e.de, arnd@...db.de,
	dianders@...omium.org, sjg@...omium.org,
	laurent.pinchart+renesas@...asonboard.com,
	u.kleine-koenig@...gutronix.de, boris.brezillon@...e-electrons.com,
	maxime.coquelin@...com, max.schwarz@...ine.de,
	schwidefsky@...ibm.com, iivanov@...sol.com,
	jacob.jun.pan@...ux.intel.com, soren.brinkmann@...inx.com,
	bjorn.andersson@...ymobile.com, andrew@...n.ch, skuribay@...ox.com,
	christian.ruppert@...lis.com, Romain.Baeriswyl@...lis.com,
	linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org
Subject: Re: [PATCH] i2c-designware: Intel BayTrail PMIC I2C bus support

On 2014/9/16 17:44, Mika Westerberg wrote:
> On Fri, Sep 12, 2014 at 10:36:07AM -0700, David E. Box wrote:
>> This patch implements an I2C bus sharing mechanism between the host and platform
>> hardware on select Intel BayTrail SoC platforms using the XPower AXP288 PMIC.
>>
>> On these platforms access to the PMIC must be shared with platform hardware. The
>> hardware unit assumes full control of the I2C bus and the host must request
>> access through a special semaphore. Hardware control of the bus also makes it
>> necessary to disable runtime pm to avoid interfering with hardware transactions.
> 
> Is this because we need to access the PMIC from host as well? I mean
> from some PMIC driver (which driver btw)?
> 
> Otherwise it would be best to just detect _SEM and return -ENODEV.

On some Baytrail platform, one I2C port is shared between CPU and Punit,
and Punit access is out the control of CPU, so

1. need to keep this shared I2C port always enabled, that is, no runtime
pm, in case Punit wants to access it.

2. need the semaphore mechanism to access i2c.

> 
>>
>> Signed-off-by: David E. Box <david.e.box@...ux.intel.com>
>> ---
>>  drivers/i2c/busses/Kconfig                  |  10 +++
>>  drivers/i2c/busses/Makefile                 |   1 +
>>  drivers/i2c/busses/i2c-designware-core.h    |  14 ++++
>>  drivers/i2c/busses/i2c-designware-platdrv.c |  78 +++++++++++++++++++--
>>  drivers/i2c/busses/i2c-shared-controller.c  | 101 ++++++++++++++++++++++++++++
>>  5 files changed, 200 insertions(+), 4 deletions(-)
>>  create mode 100644 drivers/i2c/busses/i2c-shared-controller.c
>>
>> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
>> index 2ac87fa..672ef23 100644
>> --- a/drivers/i2c/busses/Kconfig
>> +++ b/drivers/i2c/busses/Kconfig
>> @@ -441,6 +441,16 @@ config I2C_DESIGNWARE_PCI
>>  	  This driver can also be built as a module.  If so, the module
>>  	  will be called i2c-designware-pci.
>>  
>> +config I2C_SHARED_CONTROLLER
>> +	tristate "Intel Baytrail PMIC shared I2C bus support"
>> +	depends on ACPI
>> +	select IOSF_MBI
>> +	select I2C_DESIGNWARE_CORE
>> +	help
>> +	  This driver enables shared access to the PMIC I2C bus on select Intel
>> +	  BayTrail platforms using the XPower AXP288 PMIC. This driver is
>> +	  required for host access to the PMIC on these platforms.
> 
> Can't we detect this runtime in the i2c-designware-platdrv.c code so
> that you look (in the ACPI part of the driver) for _SEM and in that case
> change the xfer function behaviour a bit to return -EBUSY or whatever?
> 
> Without this horrible #ifdeffery.

not necessary to have #ifdef, really.

Thanks,
-Aubrey


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