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Message-ID: <20140918081739.GA5182@n2100.arm.linux.org.uk>
Date: Thu, 18 Sep 2014 09:17:39 +0100
From: Russell King - ARM Linux <linux@....linux.org.uk>
To: Daniel Thompson <daniel.thompson@...aro.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
patches@...aro.org, linaro-kernel@...ts.linaro.org,
John Stultz <john.stultz@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Sumit Semwal <sumit.semwal@...aro.org>,
Jason Cooper <jason@...edaemon.net>
Subject: Re: [PATCH 3.17-rc4 v7 4/6] irqchip: gic: Add support for IPI FIQ
On Wed, Sep 17, 2014 at 09:10:16AM -0700, Daniel Thompson wrote:
> @@ -604,8 +731,19 @@ static void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
> {
> int cpu;
> unsigned long flags, map = 0;
> + unsigned long softint;
>
> - raw_spin_lock_irqsave(&irq_controller_lock, flags);
> + /*
> + * The locking in this function ensures we don't use stale cpu mappings
> + * and thus we never route an IPI to the wrong physical core during a
> + * big.LITTLE switch. The switch code takes both of these locks meaning
> + * we can choose whichever lock is safe to use from our current calling
> + * context.
> + */
> + if (in_nmi())
> + raw_spin_lock(&fiq_safe_migration_lock);
> + else
> + raw_spin_lock_irqsave(&irq_controller_lock, flags);
BTW, I see this code is still here...
--
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according to speedtest.net.
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