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Message-ID: <1411006106-17339-2-git-send-email-suravee.suthikulpanit@amd.com>
Date: Wed, 17 Sep 2014 19:08:25 -0700
From: <suravee.suthikulpanit@....com>
To: <marc.zyngier@....com>, <mark.rutland@....com>,
<jason@...edaemon.net>
CC: <pawel.moll@....com>, <Catalin.Marinas@....com>,
<Will.Deacon@....com>, <liviu.dudau@....com>, <tglx@...utronix.de>,
<Harish.Kasiviswanathan@....com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <devicetree@...r.kernel.org>,
"Suravee Suthikulpanit" <Suravee.Suthikulpanit@....com>,
Mark Rutland <Mark.Rutland@....com>,
Marc Zyngier <Marc.Zyngier@....com>
Subject: [PATCH 1/2 V7] irqchip: gic: Add support for multiple MSI for ARM64
From: Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
This patch implelments the ARM64 version of arch_setup_msi_irqs(),
which does not return 1 for when PCI_CAP_ID_MSI and nvec > 1.
Cc: Mark Rutland <Mark.Rutland@....com>
Cc: Marc Zyngier <Marc.Zyngier@....com>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Catalin Marinas <Catalin.Marinas@....com>
Cc: Will Deacon <Will.Deacon@....com>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
---
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/msi.c | 41 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+)
create mode 100644 arch/arm64/kernel/msi.c
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index df7ef87..a921c42 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -29,6 +29,7 @@ arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
arm64-obj-$(CONFIG_EFI) += efi.o efi-stub.o efi-entry.o
+arm64-obj-$(CONFIG_PCI_MSI) += msi.o
obj-y += $(arm64-obj-y) vdso/
obj-m += $(arm64-obj-m)
diff --git a/arch/arm64/kernel/msi.c b/arch/arm64/kernel/msi.c
new file mode 100644
index 0000000..a295862
--- /dev/null
+++ b/arch/arm64/kernel/msi.c
@@ -0,0 +1,41 @@
+/*
+ * ARM64 architectural MSI implemention
+ *
+ * Support for Message Signalelled Interrupts for systems that
+ * implement ARM Generic Interrupt Controller: GICv2m.
+ *
+ * Copyright (C) 2014 Advanced Micro Devices, Inc.
+ * Authors: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/irq.h>
+#include <linux/msi.h>
+#include <linux/pci.h>
+
+/*
+ * ARM64 function for seting up MSI irqs.
+ * Based on driver/pci/msi.c: arch_setup_msi_irqs().
+ *
+ * Note:
+ * Current implementation assumes that all interrupt controller used in
+ * ARM64 architecture _MUST_ supports multi-MSI.
+ */
+int arm64_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ struct msi_desc *entry;
+ int ret;
+
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ ret = arch_setup_msi_irq(dev, entry);
+ if (ret < 0)
+ return ret;
+ if (ret > 0)
+ return -ENOSPC;
+ }
+
+ return 0;
+}
--
1.9.3
--
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