linux-kernel - Re: x86, microcode: BUG: microcode update that changes x86

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Message-ID: <20140919095613.GB29639@khazad-dum.debian.net>
Date:	Fri, 19 Sep 2014 06:56:14 -0300
From:	Henrique de Moraes Holschuh <hmh@....eng.br>
To:	Chuck Ebbert <cebbert.lkml@...il.com>
Cc:	Andy Lutomirski <luto@...capital.net>,
	linux-kernel@...r.kernel.org, Borislav Petkov <bp@...en8.de>,
	H Peter Anvin <hpa@...or.com>
Subject: Re: x86, microcode: BUG: microcode update that changes x86_capability

On Thu, 18 Sep 2014, Chuck Ebbert wrote:
> > > [1] sig 0x000306f2, pf mask 0x6f, 2014-09-03, rev 0x0029, size 28672
> > >     sig 0x000306c3, pf mask 0x32, 2014-07-03, rev 0x001c, size 21504
> > >     sig 0x00040651, pf mask 0x72, 2014-07-03, rev 0x001c, size 20480
> > >     sig 0x00040661, pf mask 0x32, 2014-07-03, rev 0x0012, size 23552

...

> > Given that there is exactly one microcode update like this (at least of
> > the sort that blows up userspace), I think that we should seriously
> > consider blacklisting just this particular microcode update once
> > userspace is running.
> > 
> 
> All future updates for these CPUs will have this problem.

Sort of.  Any update _from_ microcodes earlier than the above, will.

Otherwise, it depends on whether Intel TSX "testing mode" is enabled in
BIOS, and whether it "sticks" across a microcode update or gets reset to the
default of "disabled".  Updating from "disabled" to "disabled" should be
safe.

-- 
  "One disk to rule them all, One disk to find them. One disk to bring
  them all and in the darkness grind them. In the Land of Redmond
  where the shadows lie." -- The Silicon Valley Tarot
  Henrique Holschuh
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