linux-kernel - [PATCH 5/5] ARM: mvebu: armada-xp: Configure ix4-300d PCIe0 to x4

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Message-Id: <1411236391-422-6-git-send-email-sebastian.hesselbarth@gmail.com>
Date:	Sat, 20 Sep 2014 20:06:31 +0200
From:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Jason Cooper <jason@...edaemon.net>,
	Andrew Lunn <andrew@...n.ch>,
	Gregory Clement <gregory.clement@...e-electrons.com>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Subject: [PATCH 5/5] ARM: mvebu: armada-xp: Configure ix4-300d PCIe0 to x4

The PCIe controller on Port 0 of Lenovo ix4-300d is configured as
quad-lane x4. Correct the marvell,pcie-lane property accordingly.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
---
Cc: Rob Herring <robh+dt@...nel.org> 
Cc: Pawel Moll <pawel.moll@....com> 
Cc: Mark Rutland <mark.rutland@....com> 
Cc: Ian Campbell <ijc+devicetree@...lion.org.uk> 
Cc: Kumar Gala <galak@...eaurora.org> 
Cc: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Jason Cooper <jason@...edaemon.net> 
Cc: Andrew Lunn <andrew@...n.ch>
Cc: Gregory Clement <gregory.clement@...e-electrons.com>
Cc: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com> 
Cc: devicetree@...r.kernel.org 
Cc: linux-kernel@...r.kernel.org 
Cc: linux-arm-kernel@...ts.infradead.org
---
 arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
index 86be971f8fec..11f483c960b0 100644
--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
@@ -249,6 +249,7 @@
 
 /* Quad port SATA: Marvell 88SX7042 */
 &pcie00 {
+	marvell,pcie-lane = <0 1 2 3>;
 	status = "okay";
 };
 
-- 
2.0.0

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