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Message-ID: <541FDDF3.6020609@gmail.com>
Date: Mon, 22 Sep 2014 10:29:39 +0200
From: Tomasz Figa <tomasz.figa@...il.com>
To: Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Kukjin Kim <kgene.kim@...sung.com>,
Ben Dooks <ben-linux@...ff.org>,
Russell King <linux@....linux.org.uk>,
Tomasz Figa <t.figa@...sung.com>,
Mike Turquette <mturquette@...aro.org>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
CC: Kyungmin Park <kyungmin.park@...sung.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>
Subject: Re: [PATCH v2 1/3] clk: samsung: exynos3250: Register DMC clk provider
On 02.09.2014 15:21, Krzysztof Kozlowski wrote:
> Add clock provider for clocks in DMC domain including EPLL and BPLL. The
> DMC clocks are necessary for Exynos3 devfreq driver.
>
> The DMC clock domain uses different address space (0x105C0000) than
> standard clock domain (0x10030000 - 0x10050000). The difference is huge
> enough to add new DT node for the clock provider, rather than extending
> existing address space.
>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
>
> ---
>
> Changes since v1:
> =================
> 1. Fix overwritteing main clock provider reg_base with DMC clock domain
> reg_basr. This leads to OOPS in suspend.
Applied the whole series for next.
Best regards,
Tomasz
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