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Message-ID: <20140924083035.GY4015@sirena.org.uk>
Date: Wed, 24 Sep 2014 09:30:35 +0100
From: Mark Brown <broonie@...nel.org>
To: Andy Gross <agross@...eaurora.org>
Cc: "Ivan T. Ivanov" <iivanov@...sol.com>,
Bjorn Andersson <bjorn.andersson@...ymobile.com>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-spi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] spi: qup: Fix incorrect block transfers
On Tue, Sep 23, 2014 at 02:26:13PM -0500, Andy Gross wrote:
> On Tue, Sep 23, 2014 at 12:24:27PM +0300, Ivan T. Ivanov wrote:
> > On Sun, 2014-09-21 at 23:27 -0500, Andy Gross wrote:
> > > This patch fixes a number of errors with the QUP block transfer mode. Errors
> > > manifested themselves as input underruns, output overruns, and timed out
> > > transactions.
> > At what speeds are you seeing those errors?
> We've tried 25MHz and 50MHz. Both fail in the same way. Keep in mind this is
> definitely a timing / race issue and it probably also dependent on the latency
> of the attached device. I cannot reproduce this at all on my IPQ8064 based
> board, but others can.
With SPI everything is entirely clocked from the master - the attached
device can't cause any of those issues unless there's an electrical
problem that *really* upsets the master.
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