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Message-ID: <20140924093926.GT5182@n2100.arm.linux.org.uk>
Date: Wed, 24 Sep 2014 10:39:27 +0100
From: Russell King - ARM Linux <linux@....linux.org.uk>
To: Jingchang Lu <jingchang.lu@...escale.com>
Cc: vinod.koul@...el.com, arnd@...db.de, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCHv2] dmaengine: fsl-edma: fixup reg offset and hw S/G
support in big-endian model
On Wed, Sep 24, 2014 at 03:12:07PM +0800, Jingchang Lu wrote:
> static void edma_writeb(struct fsl_edma_engine *edma, u8 val, void __iomem *addr)
> {
> - iowrite8(val, addr);
> + /* swap the reg offset for these in big-endian mode */
> + if (edma->big_endian)
> + iowrite8(val, (void __iomem *)((u32)addr ^ 0x3));
NAK. /Not/ u32. unsigned long. Run this through sparse, and sparse
will complain with u32 here. Just because the driver is currently used
on a 32-bit arch is no reason to be sloppy about this.
In fact, running this through sparse (make ... C=1) or even C=2 might
well be a good idea to check whether there's any other silly mistakes.
Note that Documentation/SubmitChecklist calls for checks with sparse.
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