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Message-ID: <CAGb2v64yGmdLeWmA=+nxD85DbQf_xxUNx3n3oedFZi51uc50+w@mail.gmail.com>
Date:	Wed, 24 Sep 2014 19:53:33 +0800
From:	Chen-Yu Tsai <wens@...e.org>
To:	Gregory CLEMENT <gregory.clement@...e-electrons.com>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	devicetree <devicetree@...r.kernel.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Shuge <shuge@...winnertech.com>,
	Meng Zhang <kevin@...winnertech.com>, yhf <yhf@...rii.com>,
	ctl <ctl@...rii.com>, linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [linux-sunxi] Re: [PATCH 3/6] ARM: dts: sunxi: Add Allwinner A80 dtsi

On Wed, Sep 24, 2014 at 3:18 PM, Gregory CLEMENT
<gregory.clement@...e-electrons.com> wrote:
> Hi Chen-Yu,
>
>
>>>> +
>>>> +     memory {
>>>> +             reg = <0x20000000 0x40000000>;
>>>
>>> Usually, what we put there was the maximum amount of RAM that can be
>>> handled by the SoC. I think that it can go above 1GB
>>
>> With LPAE, it can handle 8GB. But the DT won't take 64bit values.
>> I'm not sure how to get it in. I'll look around for examples.
>
> You can have a look on what we did for Armada XP:
>
> arch/arm/boot/dts/armada-370-xp.dtsi
> arch/arm/boot/dts/armada-xp.dtsi
> arch/arm/boot/dts/armada-xp-gp.dts
>
> I created a skeleton64.dtsi for this case

Thanks for the tip. Before I send v2, I do have a question. I'm using

    ranges = <0 0 0 0x20000000>;

in the clocks and soc node to avoid having to use 64bit values for all
addresses and sizes. Would this be undesirable, even bad practice maybe?

http://linux-sunxi.org/A80/Memory_map is a document I pieced together
from Allwinner's SDK header files. AFAIK only the memory goes above
the 4GB limit. All peripherals are under 512 MB, 256MB even.


Thanks
ChenYu
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