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Message-Id: <1411579056-16966-8-git-send-email-will.deacon@arm.com>
Date: Wed, 24 Sep 2014 18:17:26 +0100
From: Will Deacon <will.deacon@....com>
To: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: arnd@...db.de, benh@...nel.crashing.org, chris@...kel.net,
cmetcalf@...era.com, davem@...emloft.net, deller@....de,
dhowells@...hat.com, geert@...ux-m68k.org,
heiko.carstens@...ibm.com, hpa@...or.com, jcmvbkbc@...il.com,
jesper.nilsson@...s.com, mingo@...hat.com, monstr@...str.eu,
paulmck@...ux.vnet.ibm.com, rdunlap@...radead.org,
sam@...nborg.org, schwidefsky@...ibm.com, starvik@...s.com,
takata@...ux-m32r.org, tglx@...utronix.de, tony.luck@...el.com,
daniel.thompson@...aro.org, broonie@...aro.org,
linux@....linux.org.uk, Will Deacon <will.deacon@....com>
Subject: [PATCH v3 07/17] ia64: io: implement dummy relaxed accessor macros for writes
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.
This patch adds dummy macros for the write accessors to ia64, which may
be able to be optimised in a similar manner to the relaxed read
accessors at a later date.
Cc: Tony Luck <tony.luck@...el.com>
Signed-off-by: Will Deacon <will.deacon@....com>
---
arch/ia64/include/asm/io.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index bee0acd52f7e..80a7e34be009 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -393,6 +393,10 @@ __writeq (unsigned long val, volatile void __iomem *addr)
#define writew(v,a) __writew((v), (a))
#define writel(v,a) __writel((v), (a))
#define writeq(v,a) __writeq((v), (a))
+#define writeb_relaxed(v,a) __writeb((v), (a))
+#define writew_relaxed(v,a) __writew((v), (a))
+#define writel_relaxed(v,a) __writel((v), (a))
+#define writeq_relaxed(v,a) __writeq((v), (a))
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel
--
2.1.0
--
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