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Message-ID: <alpine.DEB.2.10.1409251609500.4604@nanos>
Date:	Thu, 25 Sep 2014 16:27:27 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	"Joe.C" <srv_yingjoe.chen@...iatek.com>
cc:	Jiang Liu <jiang.liu@...ux.intel.com>,
	Marc Zyngier <marc.zyngier@....com>,
	Mark Rutland <mark.rutland@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Jason Cooper <jason@...edaemon.net>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Grant Likely <grant.likely@...aro.org>,
	"Joe.C" <yingjoe.chen@...iatek.com>,
	Boris BREZILLON <boris.brezillon@...e-electrons.com>,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, srv_heupstream@...iatek.com,
	yingjoe.chen@...il.com, hc.yen@...iatek.com,
	eddie.huang@...iatek.com, nathan.chung@...iatek.com,
	yh.chen@...iatek.com, Sascha Hauer <kernel@...gutronix.de>,
	Matthias Brugger <matthias.bgg@...il.com>
Subject: Re: [PATCH] [RFC] Using hierarchy irqdomian to implement MTK
 intpol.

On Thu, 25 Sep 2014, Joe.C wrote:
> From: "Joe.C" <yingjoe.chen@...iatek.com>
> 
> Here's the first draft of using hierarchy irqdomain to implement MTK intpol
> support. I have tested it and intpol works fine. Before continue, I'd like
> to get your comments. This is based on Jiang's hierarchy irqdomian [1] and
> my mediatek SoC basic support [2].
> 
> Simplified block diagram for interrupt:
> 
>     ---------      ---------
>  ---| CIRQ  |------|ARM GIC|
>  ---|       |------|       |
>  ---|       |------|       |
>  ---|       |------|       |
>  ---|       |------|       |
>     ---------      ---------
>  
> In device tree, interrupt-parent for other devices is cirq, child of gic.
> This describe HW better and allow device to specify polarity as it is sent
> by the device. I'm using interrupt-parent to specify irq domain parent in
> cirq now. Maybe adding another name like 'interrupt-domain-parent' will be
> better.

I leave that to the DT folks.
 
> Currently only set_type is implement in CIRQ, but I think this could extended
> to cover all function gic_arch_extn provided.

Right. Marc, can you have a look at this whether you can see how that
might replace the rest of the arch_extn hackery?

At least the avoidance of the set_type mess looks pretty reasonable.
 
> In order to use hierarchy irq domain, gic can't use legacy irq domain anymore.
> If arm,hierarchy-irq-domain property is specified, GIC will work in hierarchy
> way and all interrupt must be set by device tree.
> 
> One thing worth mention is arg in irq_domain_alloc_irqs. On x86, msi is using
> struct irq_alloc_info, to pass data between irq domain. In irq_create_of_mapping(),
> of_phandle_args is used. All allocs in irq_domain chain will need to use same
> interrupt-cells formats.

Right, but we leave that to the architecture implementation. It needs
to be consistent within an architecture, so we should change the "void
*arg" to a well defined type. For OF architectures this would be
of_phandle_args, other architectures can define their own struct type
which allows to transport data between the domains. That ensures
compile time type checking.

Thanks,

	tglx
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