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Message-ID: <20140925155402.GB12200@google.com>
Date: Thu, 25 Sep 2014 09:54:02 -0600
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: "Chen, Gong" <gong.chen@...ux.intel.com>
Cc: rdunlap@...radead.org, bp@...en8.de, tony.luck@...el.com,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
Heather Brown <hbrown@...com>
Subject: Re: [RESEND 0/5] PCIe, AER: Misc cleanup
[+cc Heather]
On Wed, Aug 13, 2014 at 02:22:36AM -0400, Chen, Gong wrote:
>
> No response since last commit so spread it to a bigger range.
>
> This patch series is for AER related cleanup & update based on PCIe
> SPEC r3.0.
I applied patches 1, 2 (modified as described in my response to it), 3, and
4 to pci/aer for v3.19, thanks!
I didn't apply patch 5 because it apparently doesn't fix a reported bug,
and it has the potential to break hardware that used the PCIe r1.0
definition of the "Training Error" bit.
Bjorn
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