linux-kernel - Re: [PATCH] x86, MCE, AMD: use macros to compute bank MSRs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1411891766.2029.131.camel@cyc>
Date:	Sun, 28 Sep 2014 16:09:26 +0800
From:	Chen Yucong <slaoub@...il.com>
To:	Borislav Petkov <bp@...en8.de>
Cc:	linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
	Andi Kleen <ak@...ux.intel.com>,
	"Luck, Tony" <tony.luck@...el.com>
Subject: Re: [PATCH] x86, MCE, AMD: use macros to compute bank MSRs

On Tue, 2014-09-23 at 10:16 +0800, Chen Yucong wrote:
> Avoid open coded calculations for bank MSRs by hiding the index
> of higher bank MSRs in well-defined macros.
> 
> No semantic changes.
> 
> Signed-off-by: Chen Yucong <slaoub@...il.com>
> ---
>  arch/x86/kernel/cpu/mcheck/mce_amd.c |   10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> index 5d4999f..f8c56bd 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -217,7 +217,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
>  	for (bank = 0; bank < mca_cfg.banks; ++bank) {
>  		for (block = 0; block < NR_BLOCKS; ++block) {
>  			if (block == 0)
> -				address = MSR_IA32_MC0_MISC + bank * 4;
> +				address = MSR_IA32_MCx_MISC(bank);
>  			else if (block == 1) {
>  				address = (low & MASK_BLKPTR_LO) >> 21;
>  				if (!address)
> @@ -281,7 +281,7 @@ static void amd_threshold_interrupt(void)
>  			continue;
>  		for (block = 0; block < NR_BLOCKS; ++block) {
>  			if (block == 0) {
> -				address = MSR_IA32_MC0_MISC + bank * 4;
> +				address = MSR_IA32_MCx_MISC(bank);
>  			} else if (block == 1) {
>  				address = (low & MASK_BLKPTR_LO) >> 21;
>  				if (!address)
> @@ -314,8 +314,7 @@ static void amd_threshold_interrupt(void)
>  
>  			if (high & MASK_OVERFLOW_HI) {
>  				rdmsrl(address, m.misc);
> -				rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
> -				       m.status);
> +				rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
>  				m.bank = K8_MCE_THRESHOLD_BASE
>  				       + bank * NR_BLOCKS
>  				       + block;
> @@ -617,8 +616,7 @@ static int threshold_create_bank(unsigned int cpu, unsigned int bank)
>  		}
>  	}
>  
> -	err = allocate_threshold_blocks(cpu, bank, 0,
> -					MSR_IA32_MC0_MISC + bank * 4);
> +	err = allocate_threshold_blocks(cpu, bank, 0, MSR_IA32_MCx_MISC(bank));
>  	if (!err)
>  		goto out;
>  
Hi Boris,

Can you review the above patch?

thx!
cyc

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/