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Message-Id: <1412001864-3251-10-git-send-email-boris.brezillon@free-electrons.com>
Date: Mon, 29 Sep 2014 16:44:22 +0200
From: Boris Brezillon <boris.brezillon@...e-electrons.com>
To: David Airlie <airlied@...ux.ie>, dri-devel@...ts.freedesktop.org,
Nicolas Ferre <nicolas.ferre@...el.com>,
Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>,
Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Andrew Victor <linux@...im.org.za>,
Samuel Ortiz <sameo@...ux.intel.com>,
Lee Jones <lee.jones@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
linux-pwm@...r.kernel.org, Rob Clark <robdclark@...il.com>
Cc: linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Mark Yao <mark.yao@...k-chips.com>,
Boris BREZILLON <boris.brezillon@...e-electrons.com>
Subject: [PATCH v6 09/11] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
From: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file.
Signed-off-by: Boris Brezillon <boris.brezillon@...e-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@...rion.de>
---
arch/arm/boot/dts/sama5d3_lcd.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
index e7581f6..1874cf7 100644
--- a/arch/arm/boot/dts/sama5d3_lcd.dtsi
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -166,6 +166,34 @@
};
};
+ hlcdc: hlcdc@...30000 {
+ compatible = "atmel,sama5d3-hlcdc";
+ reg = <0xf0030000 0x2000>;
+ clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
+ clock-names = "periph_clk","sys_clk", "slow_clk";
+ status = "disabled";
+
+ hlcdc-display-controller {
+ compatible = "atmel,hlcdc-display-controller";
+ interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+ };
+
+ hlcdc_pwm: hlcdc-pwm {
+ compatible = "atmel,hlcdc-pwm";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcd_pwm>;
+ #pwm-cells = <3>;
+ };
+ };
+
pmc: pmc@...ffc00 {
periphck {
lcdc_clk: lcdc_clk {
--
1.9.1
--
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