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Message-ID: <20140929221406.GE11142@qualcomm.com>
Date: Mon, 29 Sep 2014 17:14:06 -0500
From: Andy Gross <agross@...eaurora.org>
To: Archit Taneja <architt@...eaurora.org>
Cc: vinod.koul@...el.com, galak@...eaurora.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dmaengine: qcom_bam_dma: Generalize BAM register
offset calculations
On Mon, Sep 29, 2014 at 10:03:07AM +0530, Archit Taneja wrote:
> The BAM DMA IP comes in different versions. The register offset layout varies
> among these versions. The layouts depend on which generation/family of SoCs they
> belong to.
>
> The current SoCs(like 8084, 8074) have a layout where the Top level registers
> come in the beginning of the address range, followed by pipe and event
> registers. The BAM revision numbers fall above 1.4.0.
>
> The older SoCs (like 8064, 8960) have a layout where the pipe registers come
> first, and the top level come later. These have BAM revision numbers lesser than
> 1.4.0.
>
> It isn't suitable to have macros provide the register offsets with the layouts
> changed. Future BAM revisions may have different register layouts too. The
> register addresses are now calculated by referring a table which contains a base
> offset and multipliers for pipe/evnt/ee registers.
>
> We have a common function bam_addr() which computes addresses for all the
> registers. When computing address of top level/ee registers, we pass 0 to the
> pipe argument in addr() since they don't have any multiple instances.
>
> Some of the unused register definitions are removed. We can add new registers as
> we need them.
Vinod,
These changes replace the patch set I had that implemented support for the
v.1.3.0 register set.
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