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Message-ID: <D0505E5A.10E46%jojyv@juniper.net>
Date: Tue, 30 Sep 2014 20:20:03 +0000
From: Jojy Varghese <jojyv@...iper.net>
To: Scott Wood <scottwood@...escale.com>
CC: Guenter Roeck <linux@...ck-us.net>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
"Michael Ellerman" <mpe@...erman.id.au>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Guenter Roeck <groeck@...iper.net>,
"hongtao.jia@...escale.com" <hongtao.jia@...escale.com>
Subject: Re: [PATCH] powerpc/fsl: Add support for pci(e) machine check
exception on E500MC / E5500
On 9/30/14 1:17 PM, "Scott Wood" <scottwood@...escale.com> wrote:
>On Tue, 2014-09-30 at 20:15 +0000, Jojy Varghese wrote:
>>
>> On 9/30/14 8:50 AM, "Guenter Roeck" <linux@...ck-us.net> wrote:
>>
>> >On Mon, Sep 29, 2014 at 06:31:06PM -0500, Scott Wood wrote:
>> >> Which specific chip and revision did you see this on? What is the
>>value
>> >> in MCSR?
>> >>
>> >Jojy can answer that, at least for P5020. We have seen it on P5040 as
>> >well,
>> >though, so it is not just limited to one chip/revision.
>>
>> The specifics are:
>> PVR: 0x80240012
>> Instruction that causes the MC exception: lwbrx
>> The faulty load address is also present in RB. So we could change the
>> logic to use that
>> instead of DEAR. What I donĀ¹t know is of there are other cases also
>>which
>> escapes the current logic.
>
>Could you find out what MCSR was when that happened? I'm most
>interested in whether MAV was set, but the other bits would be
>interesting as well.
MCSR=a000 ( Load Error Report)
>
>-Scott
>
>
Thanks
Jojy
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