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Message-ID: <2978842.I7Hdqv7lNe@vostro.rjw.lan>
Date: Wed, 01 Oct 2014 22:46:53 +0200
From: "Rafael J. Wysocki" <rjw@...ysocki.net>
To: "Shreyas B. Prabhu" <shreyas@...ux.vnet.ibm.com>
Cc: linux-kernel@...r.kernel.org,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
linux-pm@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
"Srivatsa S. Bhat" <srivatsa@....edu>,
"Preeti U. Murthy" <preeti@...ux.vnet.ibm.com>,
Vaidyanathan Srinivasan <svaidy@...ux.vnet.ibm.com>
Subject: Re: [PATCH v2 0/3] powernv/cpuidle: Fastsleep workaround and fixes
On Wednesday, October 01, 2014 01:15:57 PM Shreyas B. Prabhu wrote:
> Fast sleep is an idle state, where the core and the L1 and L2
> caches are brought down to a threshold voltage. This also means that
> the communication between L2 and L3 caches have to be fenced. However
> the current P8 chips have a bug wherein this fencing between L2 and
> L3 caches get delayed by a cpu cycle. This can delay L3 response to
> the other cpus if they request for data during this time. Thus they
> would fetch the same data from the memory which could lead to data
> corruption if L3 cache is not flushed.
>
> This series overcomes above problem in kernel.
>
> Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>
> Cc: Paul Mackerras <paulus@...ba.org>
> Cc: Michael Ellerman <mpe@...erman.id.au>
> Cc: Rafael J. Wysocki <rjw@...ysocki.net>
> Cc: linux-pm@...r.kernel.org
> Cc: linuxppc-dev@...ts.ozlabs.org
> Cc: Srivatsa S. Bhat <srivatsa@....edu>
> Cc: Preeti U. Murthy <preeti@...ux.vnet.ibm.com>
> Cc: Vaidyanathan Srinivasan <svaidy@...ux.vnet.ibm.com>
>
> v2:
> Rebased on 3.17-rc7
> Split from 'powerpc/powernv: Support for fastsleep and winkle'
>
> v1:
> https://lkml.org/lkml/2014/8/25/446
>
> Preeti U Murthy (1):
> powerpc/powernv/cpuidle: Add workaround to enable fastsleep
>
> Shreyas B. Prabhu (1):
> powerpc/kvm/book3s_hv: Enable CPUs to run guest after waking up from
> fast-sleep
>
> Srivatsa S. Bhat (1):
> powerpc/powernv: Enable Offline CPUs to enter deep idle states
>
> arch/powerpc/include/asm/machdep.h | 3 +
> arch/powerpc/include/asm/opal.h | 7 ++
> arch/powerpc/include/asm/processor.h | 4 +-
> arch/powerpc/kernel/exceptions-64s.S | 35 ++++----
> arch/powerpc/kernel/idle.c | 19 ++++
> arch/powerpc/kernel/idle_power7.S | 2 +-
> arch/powerpc/platforms/powernv/opal-wrappers.S | 1 +
> arch/powerpc/platforms/powernv/powernv.h | 7 ++
> arch/powerpc/platforms/powernv/setup.c | 118 +++++++++++++++++++++++++
> arch/powerpc/platforms/powernv/smp.c | 11 ++-
> drivers/cpuidle/cpuidle-powernv.c | 13 ++-
> 11 files changed, 194 insertions(+), 26 deletions(-)
[2/3] seems to be missig from the series.
Also, since that mostly modifies arch/powerpc, I think it should go through
that tree. I'm fine with the cpuidle-powernv changes in [1/3] and [3/3].
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
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