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Message-ID: <20141004200016.GB7509@worktop.ger.corp.intel.com>
Date: Sat, 4 Oct 2014 22:00:16 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
Cc: linux-mips@...ux-mips.org, Zubair.Kakakhel@...tec.com,
david.daney@...ium.com, paul.gortmaker@...driver.com,
davidlohr@...com, macro@...ux-mips.org, chenhc@...ote.com,
zajec5@...il.com, james.hogan@...tec.com, keescook@...omium.org,
alex@...x-smith.me.uk, tglx@...utronix.de, blogic@...nwrt.org,
jchandra@...adcom.com, paul.burton@...tec.com,
qais.yousef@...tec.com, linux-kernel@...r.kernel.org,
ralf@...ux-mips.org, markos.chandras@...tec.com,
manuel.lauss@...il.com, akpm@...ux-foundation.org,
lars.persson@...s.com
Subject: Re: [PATCH 2/3] MIPS: Setup an instruction emulation in VDSO
protected page instead of user stack
On Fri, Oct 03, 2014 at 08:17:30PM -0700, Leonid Yegoshin wrote:
> --- a/arch/mips/include/asm/switch_to.h
> +++ b/arch/mips/include/asm/switch_to.h
> @@ -17,6 +17,7 @@
> #include <asm/dsp.h>
> #include <asm/cop2.h>
> #include <asm/msa.h>
> +#include <asm/mmu_context.h>
>
> struct task_struct;
>
> @@ -104,6 +105,16 @@ do { \
> disable_msa(); \
> } while (0)
>
> +static inline void flush_vdso_page(void)
> +{
> + if (current->mm && cpu_context(raw_smp_processor_id(), current->mm) &&
> + (current->mm->context.vdso_asid[raw_smp_processor_id()] ==
> + cpu_asid(raw_smp_processor_id(), current->mm))) {
> + local_flush_tlb_page(current->mm->mmap, (unsigned long)current->mm->context.vdso);
> + current->mm->context.vdso_asid[raw_smp_processor_id()] = 0;
> + }
> +}
Why raw_smp_processor_id() and why evaluate it 3 times, sure compilers
can be expected to do some CSE but something like:
int cpu = smp_processor_id();
if ( ... [cpu] ...)
is far more readable as well.
> +
> #define finish_arch_switch(prev) \
> do { \
> u32 __c0_stat; \
> @@ -118,6 +129,7 @@ do { \
> __restore_dsp(current); \
> if (cpu_has_userlocal) \
> write_c0_userlocal(current_thread_info()->tp_value); \
> + flush_vdso_page(); \
> __restore_watch(); \
> } while (0)
So what I didn't see is any talk about the cost of this. Surely a TLB
flush isn't exactly free.
--
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