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Message-ID: <20141007091049.GJ25331@lee--X1>
Date:	Tue, 7 Oct 2014 10:10:49 +0100
From:	Lee Jones <lee.jones@...aro.org>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Samuel Ortiz <sameo@...ux.intel.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mfd: stmpe: fix STMPE24xx GPMR LSB

On Sat, 04 Oct 2014, Linus Walleij wrote:

> The least significat byte of the GPIO value read register
> on the STMPE24xx series is on addres 0xA4 not 0xA5. Correct
> against datasheet and tested on the STMPE2401 hardware.
> 
> Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
> ---
> Hi Lee, Sam: this should go in for fixes I think.
> ---
>  drivers/mfd/stmpe.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Applied to fixes.

> diff --git a/drivers/mfd/stmpe.h b/drivers/mfd/stmpe.h
> index 2d045f26f193..bee0abf82040 100644
> --- a/drivers/mfd/stmpe.h
> +++ b/drivers/mfd/stmpe.h
> @@ -269,7 +269,7 @@ int stmpe_remove(struct stmpe *stmpe);
>  #define STMPE24XX_REG_CHIP_ID		0x80
>  #define STMPE24XX_REG_IEGPIOR_LSB	0x18
>  #define STMPE24XX_REG_ISGPIOR_MSB	0x19
> -#define STMPE24XX_REG_GPMR_LSB		0xA5
> +#define STMPE24XX_REG_GPMR_LSB		0xA4
>  #define STMPE24XX_REG_GPSR_LSB		0x85
>  #define STMPE24XX_REG_GPCR_LSB		0x88
>  #define STMPE24XX_REG_GPDR_LSB		0x8B

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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