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Message-ID: <CACRpkdaRZSyPFTHt4CnCUy6Qhcpkvqc4F9P90oA0Dj7PhtXOwg@mail.gmail.com>
Date: Tue, 7 Oct 2014 16:14:10 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Bjorn Andersson <bjorn.andersson@...ymobile.com>
Cc: "Ivan T. Ivanov" <iivanov@...sol.com>,
Grant Likely <grant.likely@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
David Collins <collinsd@...eaurora.org>,
Wu Fenglin <fenglinw@....qualcomm.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH v4 3/4] pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver
On Tue, Sep 30, 2014 at 7:02 PM, Bjorn Andersson
<bjorn.andersson@...ymobile.com> wrote:
> On Wed 24 Sep 06:09 PDT 2014, Ivan T. Ivanov wrote:
>> I am unable to make this work. of_gpio_simple_xlate() didn't know that
>> GPIO range is offset with 1. Requesting last GPIO return error. And
>> debug output looks weird, for example:
>>
>> # cat /sys/kernel/debug/gpio
>> ...
>> GPIOs 220-255, platform/0.c000.gpios, 0.c000.gpios:
>> ...
>>
>> # cat /sys/kernel/debug/pinctrl/0.c000.gpios/gpio-ranges
>> GPIO ranges handled:
>> 1: 0.c000.gpios GPIOS [221 - 256] PINS [0 - 35]
>>
>> Advice, please.
>
> Looking at of_gpio_simple_xlate() shows that you're right. It doesn't seem to
> be possible to have a gpiochip that is not 0-based. Then I guess you have to
> have your own "off-by-one-xlate".
>
> @Linus, any comments on this? All documentation states that we have
> gpio1-gpioXX in these chips, so we have to expose it as such or things will be
> messy.
I remember that drivers/pinctrl/nomadik/pinctrl-abx500.c had the
same problem, but I don't remember how we solved it sadly :-/
Yours,
Linus Walleij
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