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Message-Id: <1412858346-11334-7-git-send-email-sebastian.hesselbarth@gmail.com>
Date:	Thu,  9 Oct 2014 14:39:04 +0200
From:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
To:	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Cc:	"David S. Miller" <davem@...emloft.net>,
	Antoine Ténart 
	<antoine.tenart@...e-electrons.com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Eric Miao <eric.y.miao@...il.com>,
	Haojian Zhuang <haojian.zhuang@...il.com>,
	linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH RFT 6/8] ARM: berlin: Add BG2 ethernet DT nodes

Marvell BG2 has two fast ethernet controllers with internal PHY,
add the corresponding nodes to SoC dtsi.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
---
Cc: "David S. Miller" <davem@...emloft.net>
Cc: "Antoine Ténart" <antoine.tenart@...e-electrons.com>
Cc: Florian Fainelli <f.fainelli@...il.com>
Cc: Eric Miao <eric.y.miao@...il.com>
Cc: Haojian Zhuang <haojian.zhuang@...il.com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: netdev@...r.kernel.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---
 arch/arm/boot/dts/berlin2.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index d7e81e124de0..5f82dcfc6ac6 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -79,11 +79,47 @@
 			clocks = <&chip CLKID_TWD>;
 		};
 
+		eth1: ethernet@...000 {
+			compatible = "marvell,pxa168-eth";
+			reg = <0xb90000 0x10000>;
+			clocks = <&chip CLKID_GETH1>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+			/* set by bootloader */
+			local-mac-address = [00 00 00 00 00 00];
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy-handle = <&ethphy1>;
+			status = "disabled";
+
+			ethphy1: ethernet-phy@0 {
+				phy-connection-type = "mii";
+				reg = <0>;
+			};
+		};
+
 		cpu-ctrl@...000 {
 			compatible = "marvell,berlin-cpu-ctrl";
 			reg = <0xdd0000 0x10000>;
 		};
 
+		eth0: ethernet@...000 {
+			compatible = "marvell,pxa168-eth";
+			reg = <0xe50000 0x10000>;
+			clocks = <&chip CLKID_GETH0>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			/* set by bootloader */
+			local-mac-address = [00 00 00 00 00 00];
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy-handle = <&ethphy0>;
+			status = "disabled";
+
+			ethphy0: ethernet-phy@0 {
+				phy-connection-type = "mii";
+				reg = <0>;
+			};
+		};
+
 		apb@...000 {
 			compatible = "simple-bus";
 			#address-cells = <1>;
-- 
2.1.1

--
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