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Message-ID: <543715D7.1020505@imgtec.com>
Date: Thu, 9 Oct 2014 16:10:15 -0700
From: Leonid Yegoshin <Leonid.Yegoshin@...tec.com>
To: James Hogan <james.hogan@...tec.com>
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Subject: Re: [PATCH v2 2/3] MIPS: Setup an instruction emulation in VDSO protected
page instead of user stack
>> Small stack of emulation blocks is supported because nested traps are possible
>> in MIPS32/64 R6 emulation mix with FPU emulation.
> Could you please clarify how this nesting of emulation blocks could
> happen now that signals are handled more cleanly.
>
> I.e. isn't the emuframe stuff only required for instructions in branch
> delay slots, and branches shouldn't be in branch delay slots anyway, so
> I don't get how they could nest.
>
It may be a case for mix of FPU and MIPS R6 emulations. I just keep both
emulators separate as much as possible but I assume that without prove
it may be stackable - some rollback is needed to join both and it may
(probably) cause a double emulation setup - dsemul may be called twice
for the same pair of instructions. I didn't see that yet, honestly and
you may be right.
And as for signals - it is a different issue, some signal may happen
before or after emulated instruction in emulation block and I see that.
But I see it only before because of probability for it is a lot of
higher. Unwinding is need because signal handler may not return but
longjump to somewhere.
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