linux-kernel - [PATCH v3 20/27] MIPS/Xlr/MSI: Use MSI chip framework to configure MSI/MSI-X irq

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Message-ID: <1413342435-7876-21-git-send-email-wangyijing@huawei.com>
Date:	Wed, 15 Oct 2014 11:07:08 +0800
From:	Yijing Wang <wangyijing@...wei.com>
To:	Bjorn Helgaas <bhelgaas@...gle.com>
CC:	<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Xinwei Hu <huxinwei@...wei.com>, Wuyun <wuyun.wu@...wei.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	Russell King <linux@....linux.org.uk>,
	<linux-arch@...r.kernel.org>, <arnab.basu@...escale.com>,
	<Bharat.Bhushan@...escale.com>, <x86@...nel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Thomas Gleixner <tglx@...utronix.de>,
	"Konrad Rzeszutek Wilk" <konrad.wilk@...cle.com>,
	<xen-devel@...ts.xenproject.org>, Joerg Roedel <joro@...tes.org>,
	<iommu@...ts.linux-foundation.org>, <linux-mips@...ux-mips.org>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	<linuxppc-dev@...ts.ozlabs.org>, <linux-s390@...r.kernel.org>,
	Sebastian Ott <sebott@...ux.vnet.ibm.com>,
	"Tony Luck" <tony.luck@...el.com>, <linux-ia64@...r.kernel.org>,
	"David S. Miller" <davem@...emloft.net>,
	<sparclinux@...r.kernel.org>, Chris Metcalf <cmetcalf@...era.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Lucas Stach <l.stach@...gutronix.de>,
	David Vrabel <david.vrabel@...rix.com>,
	"Sergei Shtylyov" <sergei.shtylyov@...entembedded.com>,
	Michael Ellerman <mpe@...erman.id.au>,
	Thierry Reding <thierry.reding@...il.com>,
	"Thomas Petazzoni" <thomas.petazzoni@...e-electrons.com>,
	Liviu Dudau <liviu@...au.co.uk>,
	Yijing Wang <wangyijing@...wei.com>
Subject: [PATCH v3 20/27] MIPS/Xlr/MSI: Use MSI chip framework to configure MSI/MSI-X irq

Use MSI chip framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.

Signed-off-by: Yijing Wang <wangyijing@...wei.com>
---
 arch/mips/pci/pci-xlr.c |   17 +++++++++++++++--
 1 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 0dde803..0e611de 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -149,6 +149,8 @@ static struct resource nlm_pci_io_resource = {
 	.flags		= IORESOURCE_IO,
 };
 
+static struct msi_chip xlr_msi_chip;
+
 struct pci_controller nlm_pci_controller = {
 	.index		= 0,
 	.pci_ops	= &nlm_pci_ops,
@@ -156,6 +158,9 @@ struct pci_controller nlm_pci_controller = {
 	.mem_offset	= 0x00000000UL,
 	.io_resource	= &nlm_pci_io_resource,
 	.io_offset	= 0x00000000UL,
+#ifdef CONFIG_PCI_MSI
+	.msi_chip = &xlr_msi_chip,
+#endif
 };
 
 /*
@@ -214,11 +219,13 @@ static int get_irq_vector(const struct pci_dev *dev)
 }
 
 #ifdef CONFIG_PCI_MSI
-void arch_teardown_msi_irq(unsigned int irq)
+static void xlr_teardown_msi_irq(struct msi_chip *chip,
+		unsigned int irq)
 {
 }
 
-int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
+static int xlr_setup_msi_irq(struct msi_chip *chip,
+		struct pci_dev *dev, struct msi_desc *desc)
 {
 	struct msi_msg msg;
 	struct pci_dev *lnk;
@@ -263,6 +270,12 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 	write_msi_msg(irq, &msg);
 	return 0;
 }
+
+static struct msi_chip xlr_msi_chip = {
+	.setup_irq = xlr_setup_msi_irq,
+	.teardown_irq = xlr_teardown_msi_irq,
+};
+
 #endif
 
 /* Extra ACK needed for XLR on chip PCI controller */
-- 
1.7.1

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