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Message-Id: <1413393785-26783-3-git-send-email-kever.yang@rock-chips.com>
Date: Wed, 15 Oct 2014 10:23:01 -0700
From: Kever Yang <kever.yang@...k-chips.com>
To: heiko@...ech.de
Cc: dianders@...omium.org, sonnyrao@...omium.org,
addy.ke@...k-chips.com, cf@...k-chips.com, xjq@...k-chips.com,
hj@...k-chips.com, huangtao@...k-chips.com,
linux-rockchip@...ts.infradead.org,
Kever Yang <kever.yang@...k-chips.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>,
Arnd Bergmann <arnd@...db.de>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Olof Johansson <olof@...om.net>,
Catalin Marinas <catalin.marinas@....com>,
Marc Carino <marc.ceeeee@...il.com>,
Rohit Vaswani <rvaswani@...eaurora.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v5 2/6] ARM: rockchip: add option to access the pmu via a phandle in smp_operations
From: Heiko Stuebner <heiko@...ech.de>
Makes it possible to define a rockchip,pmu phandle in the cpus node directly
referencing the pmu syscon instead of searching for specific compatible.
The old way of finding the pmu stays of course available.
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
Signed-off-by: Kever Yang <kever.yang@...k-chips.com>
---
Changes in v5: None
Changes in v4:
- add rockchip,pmu property into cpus.txt
Changes in v3:
- add this patch
Changes in v2: None
Documentation/devicetree/bindings/arm/cpus.txt | 9 +++++++++
arch/arm/mach-rockchip/platsmp.c | 13 +++++++++++++
2 files changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index fc44634..b2aacbe 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -227,6 +227,15 @@ nodes to be present and contain the properties described below.
# List of phandles to idle state nodes supported
by this cpu [3].
+ - rockchip,pmu
+ Usage: optional for systems that have an "enable-method"
+ property value of "rockchip,rk3066-smp"
+ While optional, it is the preferred way to get access to
+ the cpu-core power-domains.
+ Value type: <phandle>
+ Definition: Specifies the syscon node controlling the cpu core
+ power domains.
+
Example 1 (dual-cluster big.LITTLE system 32-bit):
cpus {
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 4c36fbf..57b53b3 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -155,6 +155,19 @@ static int __init rockchip_smp_prepare_pmu(void)
struct device_node *node;
void __iomem *pmu_base;
+ /*
+ * This function is only called via smp_ops->smp_prepare_cpu().
+ * That only happens if a "/cpus" device tree node exists
+ * and has an "enable-method" property that selects the SMP
+ * operations defined herein.
+ */
+ node = of_find_node_by_path("/cpus");
+
+ pmu = syscon_regmap_lookup_by_phandle(node, "rockchip,pmu");
+ of_node_put(node);
+ if (!IS_ERR(pmu))
+ return 0;
+
pmu = syscon_regmap_lookup_by_compatible("rockchip,rk3066-pmu");
if (!IS_ERR(pmu))
return 0;
--
1.9.1
--
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