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Message-ID: <20141016091433.GI28786@8bytes.org>
Date: Thu, 16 Oct 2014 11:14:33 +0200
From: Joerg Roedel <joro@...tes.org>
To: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Kallol Biswas <nucleodyne@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"open list:INTEL IOMMU (VT-d)" <iommu@...ts.linux-foundation.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
Jay Cornwall <jay.cornwall@....com>
Subject: Re: PCIe PASID (Process Address Space ID) and iommu code
On Wed, Oct 15, 2014 at 09:50:58PM -0600, Bjorn Helgaas wrote:
> [+cc Joerg, Suravee, Jay, iommu list, linux-pci]
>
> On Wed, Oct 15, 2014 at 5:44 PM, Kallol Biswas <nucleodyne@...il.com> wrote:
> > Resending, as message got bounced for html content.
> > --------------------------------------------
> > Hi,
> > PCIe has introduced PASID TLP Prefix. There are two ECNs on this.
> >
> > It seems that AMD iommu code makes use of PASID. Is there a device that
> > utilizes this TLP prefix?
Yes, recent radeon GPUs can make use of the TLP prefix.
> > PASID allocation and management within a device is not clear to me. How
> > does device know which PASID to issue for which virtual address? Who makes
> > the association? Must be software/OS, but how? There is no table for this
> > like MSI-X table.
The setup of the PASIDs is device specific, so there is no standard for
setting up PASID address spaces on devices.
HTH,
Joerg
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