lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 17 Oct 2014 13:48:19 -0500
From:	Felipe Balbi <balbi@...com>
To:	Paul Zimmerman <Paul.Zimmerman@...opsys.com>
CC:	"balbi@...com" <balbi@...com>, Huang Rui <ray.huang@....com>,
	Alan Stern <stern@...land.harvard.edu>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	Vincent Wan <vincent.wan@....com>, Tony Li <tony.li@....com>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 16/16] usb: dwc3: enable usb suspend phy

Hi,

On Fri, Oct 17, 2014 at 06:41:04PM +0000, Paul Zimmerman wrote:
> > From: Felipe Balbi [mailto:balbi@...com]
> > Sent: Friday, October 17, 2014 8:00 AM
> > 
> > On Fri, Oct 17, 2014 at 04:53:41PM +0800, Huang Rui wrote:
> > > AMD NL needs to suspend usb3 ss phy, but this doesn't enable on simulation
> > > board.
> > >
> > > Signed-off-by: Huang Rui <ray.huang@....com>
> > > ---
> > >  drivers/usb/dwc3/core.c          | 7 ++++++-
> > >  drivers/usb/dwc3/dwc3-pci.c      | 3 ++-
> > >  drivers/usb/dwc3/platform_data.h | 1 +
> > >  3 files changed, 9 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > > index 3ccfe41..4a98696 100644
> > > --- a/drivers/usb/dwc3/core.c
> > > +++ b/drivers/usb/dwc3/core.c
> > > @@ -395,6 +395,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
> > >  	if (dwc->quirks & DWC3_QUIRK_TX_DEEPH)
> > >  		reg |= DWC3_GUSB3PIPECTL_TX_DEEPH(1);
> > >
> > > +	if (dwc->quirks & DWC3_QUIRK_SUSPHY)
> > 
> > should be:
> > 
> > 	if (!dwc->suspend_usb3_phy_quirk)
> > 
> > > +		reg |= DWC3_GUSB3PIPECTL_SUSPHY;
> > 
> > IIRC, databook asks us to set that bit anyway, so the quirk is disabling
> > that bit. Am I missing something ? Paul ?
> 
> It looks to me that Huang's patch is enabling that bit, not disabling
> it.

right, but that's what's actually quirky right ? IIRC, Databook asks us
to set usb2 and usb3 suspend phy bits and we're just not doing it.

> Currently the driver does not set either DWC3_GUSB3PIPECTL_SUSPHY or
> DWC3_GUSB2PHYCFG_SUSPHY (unless it has been added by that big patch
> series you just posted). According to the databook, both of those
> bits should be set to 1 after the core initialization has completed.

there you go. So unless that quirk bit flag is set, we're safe of
setting SUSPHY bit for everybody.

> So I think the driver should be changed to enable both of those by
> default, and then maybe you want quirks to disable them if there is
> some platform out there which needs that.

Yeah, that's what I thought too :-) Thanks for confirming

-- 
balbi

Download attachment "signature.asc" of type "application/pgp-signature" (820 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ