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Date:	Mon, 20 Oct 2014 02:26:19 -0700
From:	Neil Zhang <zhangwm@...vell.com>
To:	Will Deacon <will.deacon@....com>,
	Sudeep Holla <Sudeep.Holla@....com>
CC:	"'linux@....linux.org.uk'" <linux@....linux.org.uk>,
	"'linux-arm-kernel@...ts.infradead.org'" 
	<linux-arm-kernel@...ts.infradead.org>,
	"'linux-kernel@...r.kernel.org'" <linux-kernel@...r.kernel.org>,
	"'devicetree@...r.kernel.org'" <devicetree@...r.kernel.org>,
	"mathieu.poirier@...aro.org" <mathieu.poirier@...aro.org>
Subject: RE: [PATCH v4] ARM: perf: save/restore pmu registers in pm notifier


> -----Original Message-----
> From: Will Deacon [mailto:will.deacon@....com]
> Sent: 2014年10月20日 17:20
> To: Sudeep Holla
> Cc: Neil Zhang; 'linux@....linux.org.uk'; 'linux-arm-
> kernel@...ts.infradead.org'; 'linux-kernel@...r.kernel.org';
> 'devicetree@...r.kernel.org'; mathieu.poirier@...aro.org
> Subject: Re: [PATCH v4] ARM: perf: save/restore pmu registers in pm
> notifier
> 
> On Mon, Oct 20, 2014 at 10:16:16AM +0100, Sudeep Holla wrote:
> > On 20/10/14 09:46, Neil Zhang wrote:
> > > Will, I prefer to check always-on field under PMU node to check
> > > whether we need Save/restore them.
> > >
> > But how do you handle it for different idle states. e.g. if CPU is in
> > retention, PMU's *might be* retained. Also I don't think PMUs will be
> > placed in "always-on" power domain like timers. So using "always-on"
> > sounds incorrect to me.
> 
> Adding Mathieu to CC, since I spoke to him at LPC about this and he was
> talking about implementing proper PM domain descriptions for coresight
> components.
> 

Good to know that!
Hope we can figure out it with a proper way.

> Will

Best Regards,
Neil Zhang

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