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Date:	Mon, 20 Oct 2014 12:51:10 +0200
From:	Hendrik Brueckner <>
To:	Peter Zijlstra <>
Cc:	Andy Lutomirski <>,
	Valdis Kletnieks <>,
	"" <>,
	Paul Mackerras <>,
	Arnaldo Carvalho de Melo <>,
	Ingo Molnar <>,
	Kees Cook <>,
	Andrea Arcangeli <>,
	Erik Bosman <>,,,,
Subject: Re: [RFC 5/5] x86,perf: Only allow rdpmc if a perf_event is mapped

On Mon, Oct 20, 2014 at 10:48:13AM +0200, Peter Zijlstra wrote:
> On Sun, Oct 19, 2014 at 05:08:08PM -0700, Andy Lutomirski wrote:
> > There are a whole bunch of implementations of that
> > callback:
> > 
> >  - perf_event_idx_default seems fishy
> I suppose I did that to encode the rule that 0 := disabled, figuring
> that if there is no actual instruction to access the data, all of this
> would be pointless anyhow.

See comment on "perf_swevent_event_idx returns 0".

> >  - cpumsf_pmu_event_idx is the same as power_pmu_event_idx.
> Oh cute, lets ask the s390 people, do you guys have a userspace
> instruction to read the actual counter value?

For the hardware sampling pmu (cpumsf) there is no instruction to read
sampling data in user space.  Also the event->hw.index is always set
to zero anyway.  I am going to remove this function and let the core
event code handle the proper default.

As Martin Schwidefsky pointed out in his mail, there is an instruction
to read some hardware counter data (different to the sampling data).
User space is prohibited to use this instruction.  Instead, user space
can use another approach which is called runtime instrumentation, for

> >  - perf_swevent_event_idx returns 0.
> Right, guaranteed no way to access any of that, maybe we should make
> the default like that too.

I think it would makes sense to return 0 as default in the
perf_event_idx_default() and let each PMU/arch that actually supports
reading PMCs from user space return the proper index.  And according
to tools/perf/design.txt, index must be non-zero to trigger a user space

Thanks and kind regards,

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