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Message-ID: <20141021111806.GX23531@worktop.programming.kicks-ass.net>
Date: Tue, 21 Oct 2014 13:18:06 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: linux-kernel@...r.kernel.org, mingo@...e.hu, ak@...ux.intel.com,
jolsa@...hat.com, kan.liang@...el.com, bp@...en8.de,
maria.n.dimakopoulou@...il.com
Subject: Re: [PATCH v2 05/12] perf/x86: add cross-HT counter exclusion
infrastructure
On Thu, Oct 09, 2014 at 06:34:39PM +0200, Stephane Eranian wrote:
> +++ b/arch/x86/kernel/cpu/perf_event.h
> @@ -71,6 +71,7 @@ struct event_constraint {
> #define PERF_X86_EVENT_COMMITTED 0x8 /* event passed commit_txn */
> #define PERF_X86_EVENT_PEBS_LD_HSW 0x10 /* haswell style datala, load */
> #define PERF_X86_EVENT_PEBS_NA_HSW 0x20 /* haswell style datala, unknown */
> +#define PERF_X86_EVENT_EXCL 0x40 /* HT exclusivity on counter */
>
lkml.kernel.org/r/CAHzUATgam8qrma+B-d=9jOHpmmiwNwk-717roNY=ndbJAZefjw@...l.gmail.com
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