lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 23 Oct 2014 09:19:44 +0200
From:	Jiri Olsa <jolsa@...hat.com>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	linux-kernel@...r.kernel.org, peterz@...radead.org, mingo@...e.hu,
	ak@...ux.intel.com, kan.liang@...el.com, bp@...en8.de,
	maria.n.dimakopoulou@...il.com
Subject: Re: [PATCH v2 06/12] perf/x86: implement cross-HT corruption bug
 workaround

On Wed, Oct 22, 2014 at 02:31:51PM +0200, Jiri Olsa wrote:
> On Thu, Oct 09, 2014 at 06:34:40PM +0200, Stephane Eranian wrote:
> > From: Maria Dimakopoulou <maria.n.dimakopoulou@...il.com>
> 
> SNIP
> 
> > +static struct event_constraint *
> > +intel_get_excl_constraints(struct cpu_hw_events *cpuc, struct perf_event *event,
> > +			   int idx, struct event_constraint *c)
> > +{
> > +	struct event_constraint *cx;
> > +	struct intel_excl_cntrs *excl_cntrs = cpuc->excl_cntrs;
> > +	struct intel_excl_states *xl, *xlo;
> > +	int is_excl, i;
> 
> SNIP
> 
> > +	/*
> > +	 * Modify static constraint with current dynamic
> > +	 * state of thread
> > +	 *
> > +	 * EXCLUSIVE: sibling counter measuring exclusive event
> > +	 * SHARED   : sibling counter measuring non-exclusive event
> > +	 * UNUSED   : sibling counter unused
> > +	 */
> > +	for_each_set_bit(i, cx->idxmsk, X86_PMC_IDX_MAX) {
> > +		/*
> > +		 * exclusive event in sibling counter
> > +		 * our corresponding counter cannot be used
> > +		 * regardless of our event
> > +		 */
> > +		if (xl->state[i] == INTEL_EXCL_EXCLUSIVE)
> > +			__clear_bit(i, cx->idxmsk);
> 
> if we want to check sibling counter, shouldn't we check xlo->state[i] instead? like
> 
> 		if (xlo->state[i] == INTEL_EXCL_EXCLUSIVE)
> 			__clear_bit(i, cx->idxmsk);
> 	   
> 
> and also in condition below?

any comment on this? I'm curious, because it'd enlighten me
on how this is supposed to work ;-)

I dont understand why you update the sibling's counter state instead
of the current cpuc->excl_thread_id HT, like in intel_commit_scheduling
while you hold lock for the current HT state

could you please comment, I must be missing something

thanks,
jirka
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists