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Message-ID: <87bnp13o57.fsf@ashishki-desk.ger.corp.intel.com>
Date: Fri, 24 Oct 2014 10:47:16 +0300
From: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
Robert Richter <rric@...nel.org>,
Frederic Weisbecker <fweisbec@...il.com>,
Mike Galbraith <efault@....de>,
Paul Mackerras <paulus@...ba.org>,
Stephane Eranian <eranian@...gle.com>,
Andi Kleen <ak@...ux.intel.com>, kan.liang@...el.com,
adrian.hunter@...el.com, acme@...radead.org
Subject: Re: [PATCH v5 11/20] x86: perf: Intel PT and LBR/BTS are mutually exclusive
Peter Zijlstra <peterz@...radead.org> writes:
> On Mon, Oct 13, 2014 at 04:45:39PM +0300, Alexander Shishkin wrote:
>> Intel PT cannot be used at the same time as LBR or BTS and will cause a
>> general protection fault if they are used together. In order to avoid
>> fixing up GPs in the fast path, instead we use flags to indicate that
>> that one of these is in use so that the other avoids MSR access altogether.
>>
>
> Yeah, don't like this. Like I've said many times before we should simply
> disallow creating PT events when there are LBR events and vice versa.
Ok, I must have misunderstood you before. This makes things a bit
easier.
Regards,
--
Alex
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