linux-kernel - Re: [RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAMou1-3n5pC4C_7x_5oxz0WG3sOifKvG-wCER_5g6VeniEJ=6A@mail.gmail.com>
Date:	Fri, 24 Oct 2014 03:33:14 +0100
From:	Robert Bragg <robert@...bynine.org>
To:	Chris Wilson <chris@...is-wilson.co.uk>
Cc:	linux-kernel@...r.kernel.org,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Daniel Vetter <daniel.vetter@...ll.ch>,
	Rob Clark <robdclark@...il.com>,
	Samuel Pitoiset <samuel.pitoiset@...il.com>,
	Ben Skeggs <bskeggs@...hat.com>
Subject: Re: [RFC PATCH 3/3] i915: Expose PMU for Observation Architecture

On Thu, Oct 23, 2014 at 8:47 AM, Chris Wilson <chris@...is-wilson.co.uk> wrote:
> On Wed, Oct 22, 2014 at 04:28:51PM +0100, Robert Bragg wrote:
>> +     /* XXX: Not sure that this is really acceptable...
>> +      *
>> +      * i915_gem_context.c currently owns pinning/unpinning legacy
>> +      * context buffers and although that code has a
>> +      * get_context_alignment() func to handle a different
>> +      * constraint for gen6 we are assuming it's fixed for gen7
>> +      * here. Another option besides pinning here would be to
>> +      * instead hook into context switching and update the
>> +      * OACONTROL configuration on the fly.
>> +      */
>> +     if (dev_priv->oa_pmu.specific_ctx) {
>> +             struct intel_context *ctx = dev_priv->oa_pmu.specific_ctx;
>> +             int ret;
>> +
>> +             ret = i915_gem_obj_ggtt_pin(ctx->legacy_hw_ctx.rcs_state,
>> +                                         4096, 0);
>
> Right if you pin it here with a different alignment, when we try to  pin
> it with the required hw ctx alignment it will fail. Easiest way is to
> record the ctx->legacy_hw_ctx.alignment and reuse that here.

Ok I can look into that a bit more. I'm not currently sure I can assume the
ctx will have been pinned before, to be able to record the alignment.
Skimming i915_gem_context.c, it looks like we only pin the default context
on creation and a user could open a perf even before we first switch to that
context.

I wonder if it would be ok to expose an i915_get_context_alignment() api to
deal with this?

>
>> +             if (ret) {
>> +                     DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
>> +                     ret = -EBUSY;
>
> As an exercise, think of all the possible error values from pin() and
> tell me why overriding that here is a bad, bad idea.

Hmm, I'm not quite sure why I decided to squash the error code there, it
looks pretty arbitrary. My take on your comment a.t.m is essentially that
some of the pin() errors don't really represent a busy state where it would
make sense for userspace to try again later; such as -ENODEV. Sorry if you
saw a very specific case that offended you :-) I have removed the override
locally.

Thanks for taking a look.

- Robert

> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/