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Message-ID: <1414416142-31239-16-git-send-email-wangyijing@huawei.com>
Date: Mon, 27 Oct 2014 21:22:21 +0800
From: Yijing Wang <wangyijing@...wei.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Xinwei Hu <huxinwei@...wei.com>, Wuyun <wuyun.wu@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>,
Russell King <linux@....linux.org.uk>, <x86@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
<xen-devel@...ts.xenproject.org>, Joerg Roedel <joro@...tes.org>,
<iommu@...ts.linux-foundation.org>, <linux-mips@...ux-mips.org>,
"Benjamin Herrenschmidt" <benh@...nel.crashing.org>,
<linuxppc-dev@...ts.ozlabs.org>, <linux-s390@...r.kernel.org>,
Sebastian Ott <sebott@...ux.vnet.ibm.com>,
"Tony Luck" <tony.luck@...el.com>, <linux-ia64@...r.kernel.org>,
"David S. Miller" <davem@...emloft.net>,
<sparclinux@...r.kernel.org>, Chris Metcalf <cmetcalf@...era.com>,
Ralf Baechle <ralf@...ux-mips.org>,
Lucas Stach <l.stach@...gutronix.de>,
David Vrabel <david.vrabel@...rix.com>,
"Sergei Shtylyov" <sergei.shtylyov@...entembedded.com>,
Michael Ellerman <mpe@...erman.id.au>,
Thierry Reding <thierry.reding@...il.com>,
"Thomas Petazzoni" <thomas.petazzoni@...e-electrons.com>,
Yijing Wang <wangyijing@...wei.com>
Subject: [PATCH 15/16] tile/MSI: Use MSI controller framework to configure MSI/MSI-X irq
Use MSI controller framework instead of arch MSI functions to configure
MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework.
Signed-off-by: Yijing Wang <wangyijing@...wei.com>
---
arch/tile/include/asm/pci.h | 2 ++
arch/tile/kernel/pci_gx.c | 18 ++++++++++++++++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index dfedd7a..3ebd66b 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -152,6 +152,7 @@ struct pci_controller {
int pio_io_index; /* PIO region index for I/O space access */
#endif
+ struct msi_controller *msi_ctrl;
/*
* Mem-Map regions for all the memory controllers so that Linux can
* map all of its physical memory space to the PCI bus.
@@ -179,6 +180,7 @@ struct pci_controller {
int irq_intx_table[4];
};
+extern struct msi_controller tilegx_msi_ctrl;
extern struct pci_controller pci_controllers[TILEGX_NUM_TRIO * TILEGX_TRIO_PCIES];
extern gxio_trio_context_t trio_contexts[TILEGX_NUM_TRIO];
extern int num_trio_shims;
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e39f9c5..6bf5a24 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -887,6 +887,7 @@ int __init pcibios_init(void)
controller->mem_offset);
pci_add_resource(&resources, &controller->io_space);
controller->first_busno = next_busno;
+ controller->msi_ctrl = &tilegx_msi_ctrl;
bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
controller, &resources);
controller->root_bus = bus;
@@ -1485,7 +1486,15 @@ static struct irq_chip tilegx_msi_chip = {
/* TBD: support set_affinity. */
};
-int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
+struct msi_controller *pcibios_msi_controller(struct pci_bus *bus)
+{
+ struct pci_controller *controller = bus->sysdata;
+
+ return controller->msi_ctrl;
+}
+
+static int tile_setup_msi_irq(struct msi_controller *ctrl,
+ struct pci_dev *pdev, struct msi_desc *desc)
{
struct pci_controller *controller;
gxio_trio_context_t *trio_context;
@@ -1604,7 +1613,12 @@ is_64_failure:
return ret;
}
-void arch_teardown_msi_irq(unsigned int irq)
+static void tile_teardown_msi_irq(struct msi_controller *ctrl, unsigned int irq)
{
irq_free_hwirq(irq);
}
+
+struct msi_controller tilegx_msi_ctrl = {
+ .setup_irq = tile_setup_msi_irq,
+ .teardown_irq = tile_teardown_msi_irq,
+};
--
1.7.1
--
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