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Message-Id: <1414486287-25498-3-git-send-email-caesar.wang@rock-chips.com>
Date: Tue, 28 Oct 2014 16:51:24 +0800
From: Caesar Wang <caesar.wang@...k-chips.com>
To: heiko@...ech.de, rui.zhang@...el.com, edubezval@...il.com
Cc: zyf@...k-chips.com, dianders@...omium.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
cf@...k-chips.com, dmitry.torokhov@...il.com,
dbasehore@...omium.org, huangtao@...k-chips.com,
cjf@...k-chips.com, zhengsq@...k-chips.com,
Caesar Wang <caesar.wang@...k-chips.com>
Subject: [PATCH v15 2/5] dt-bindings: document Rockchip thermal
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng <zyf@...k-chips.com>
Signed-off-by: Caesar Wang <caesar.wang@...k-chips.com>
---
.../bindings/thermal/rockchip-thermal.txt | 62 ++++++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
new file mode 100644
index 0000000..fc30e1b
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -0,0 +1,62 @@
+* Temperature Sensor ADC (TSADC) on rockchip SoCs
+
+Required properties:
+- compatible : "rockchip,rk3288-tsadc"
+- reg : physical base address of the controller and length of memory mapped
+ region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+ depends on the interrupt controller.
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
+ the peripheral clock.
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+- hw-shut-temp : The hardware-controlled shutdown temperature value.
+- tsadc-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
+- tsadc-tshut-polarity : The hardware-controlled active polarity 0:LOW 1:HIGH.
+
+Exiample:
+tsadc: tsadc@...80000 {
+ compatible = "rockchip,rk3288-tsadc";
+ reg = <0xff280000 0x100>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+ clock-names = "tsadc", "apb_pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&otp_out>;
+ #thermal-sensor-cells = <1>;
+ hw-shut-temp = <125000>;
+ tsadc-tshut-mode = <0>;
+ tsadc-tshut-polarity = <0>;
+};
+
+Example: referring to thermal sensors:
+thermal-zones {
+ cpu_thermal: cpu_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /* sensor ID */
+ thermal-sensors = <&tsadc 1>;
+
+ trips {
+ cpu_alert0: cpu_alert {
+ temperature = <80000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_crit: cpu_crit {
+ temperature = <120000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+};
--
1.9.1
--
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