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Date:	Tue, 28 Oct 2014 22:53:08 +0100 (CET)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Andi Kleen <ak@...ux.intel.com>
cc:	Peter Zijlstra <peterz@...radead.org>,
	Andi Kleen <andi@...stfloor.org>, mingo@...nel.org,
	eranian@...gle.com, dzickus@...hat.com, jmario@...hat.com,
	acme@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] Attempt to cleanup the HSW offcore bits

Andi,

On Mon, 27 Oct 2014, Andi Kleen wrote:
> On Mon, Oct 27, 2014 at 02:07:12PM +0100, Peter Zijlstra wrote:
> > On Mon, Oct 27, 2014 at 01:23:40PM +0100, Andi Kleen wrote:
> > > On Thu, Oct 23, 2014 at 12:51:19PM +0200, Peter Zijlstra wrote:
> > > > So Don asked about offcore and because I forgot I looked at the code and found
> > > > the terrible mess Andi created with the HSW/BDW bits.
> > > > 
> > > > This series attempts to clean some of that up but seeing how it was all magic
> > > > numbers 
> > > 
> > > All the bits are documented. The actual definitions are available
> > > in the JSON offcore definitions at https://download.01.org/perfmon/
> > 
> > Yeah, no. That's not how we write code. Also, there's no actual JSON
> > offcore file for HSW only some TSV file, and I've no mind to go decode
> 
> https://download.01.org/perfmon/HSW/Haswell_matrix_V14.json
> https://download.01.org/perfmon/HSW/Haswell_matrix_bit_definitions_V14.json

Of course you did not answer any of the other legitimate questions
Peter brought up.

Care to answer them w/o pointing to magic json files which lack ANY
useful information about the magic bits they provide? And why they are
not consistent with the SDM?

Either you come forth with reasonable explanations or I'm going to rip
out the mess you created even before Peter can persuade himself to do
so. 

Thanks,

	tglx

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