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Message-ID: <1414462887.20336.10.camel@debian>
Date: Tue, 28 Oct 2014 10:21:27 +0800
From: Chen Yucong <slaoub@...il.com>
To: "Luck, Tony" <tony.luck@...el.com>
Cc: "bp@...en8.de" <bp@...en8.de>,
"ak@...ux.intel.com" <ak@...ux.intel.com>,
"aravind.gopalakrishnan@....com" <aravind.gopalakrishnan@....com>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] x86, mce: support memory error recovery for both
UCNA and Deferred error in machine_check_poll
On Mon, 2014-10-27 at 23:10 +0000, Luck, Tony wrote:
> + m->mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
> + severity = mce_severity(m, mca_cfg.tolerant, NULL);
>
> This seems a big hack to make mce_severity() work when called from
> CMCI context (when MCG_STATUS register is not set). It would also
> be confusing as the subsequent logged entries would show MCIP and RIPV
> bits set in the mcg_status.
>
In fact, I have already noticed this issue from the start. But the
Intel SDM document that MCIP/RIPV/EIPV are specific to machine check
exception. And I don't know if the above flag bits will be checked in
CMCI context by error log/decode handlers.
> If someone can think of a less hacky way to do this, that would be good. Otherwise
> the code needs a comment, and should reset m->mcg_status to avoid making logs
> that have incorrect data.
>
Yes! the above code snippet should be commented. And another method
that can be used for restoring m->mcgstatus is shown below.
+ u8 mcgs = m->mcgstatus & 0xff;
+
+ m->mcgstatus |= (MCG_STATUS_MCIP|MCG_STATUS_RIPV);
+ severity = mce_severity(m, mca_cfg.tolerant, NULL);
+ m->mcgstatus = (m->mcgstatus & ~0xff) | mcgs;
thx!
cyc
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